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| author | Tom Rini <trini@konsulko.com> | 2022-12-04 10:13:47 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2022-12-23 10:15:12 -0500 |
| commit | 24513c3ac85456e8c8256b83ecc44ccaedcee65a (patch) | |
| tree | d0ebafe863278c8c79df4ae415cfd17de3a52d55 /drivers/net | |
| parent | ddc418703353f00215962bc083523784a1c01c32 (diff) | |
| download | u-boot-24513c3ac85456e8c8256b83ecc44ccaedcee65a.tar.gz u-boot-24513c3ac85456e8c8256b83ecc44ccaedcee65a.tar.bz2 u-boot-24513c3ac85456e8c8256b83ecc44ccaedcee65a.zip | |
global: Migrate CONFIG_SH_ETHER_ALIGNE_SIZE to CFG
Perform a simple rename of CONFIG_SH_ETHER_ALIGNE_SIZE to CFG_SH_ETHER_ALIGNE_SIZE
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'drivers/net')
| -rw-r--r-- | drivers/net/sh_eth.c | 4 | ||||
| -rw-r--r-- | drivers/net/sh_eth.h | 16 |
2 files changed, 10 insertions, 10 deletions
diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c index 0c584a23b9..90e47d93aa 100644 --- a/drivers/net/sh_eth.c +++ b/drivers/net/sh_eth.c @@ -41,7 +41,7 @@ !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) #define flush_cache_wback(addr, len) \ flush_dcache_range((unsigned long)addr, \ - (unsigned long)(addr + ALIGN(len, CONFIG_SH_ETHER_ALIGNE_SIZE))) + (unsigned long)(addr + ALIGN(len, CFG_SH_ETHER_ALIGNE_SIZE))) #else #define flush_cache_wback(...) #endif @@ -49,7 +49,7 @@ #if defined(CONFIG_SH_ETHER_CACHE_INVALIDATE) && defined(CONFIG_ARM) #define invalidate_cache(addr, len) \ { \ - unsigned long line_size = CONFIG_SH_ETHER_ALIGNE_SIZE; \ + unsigned long line_size = CFG_SH_ETHER_ALIGNE_SIZE; \ unsigned long start, end; \ \ start = (unsigned long)addr; \ diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h index 520f7f7325..1c07610e1a 100644 --- a/drivers/net/sh_eth.h +++ b/drivers/net/sh_eth.h @@ -29,8 +29,8 @@ #endif /* defined(CONFIG_SH) */ /* base padding size is 16 */ -#ifndef CONFIG_SH_ETHER_ALIGNE_SIZE -#define CONFIG_SH_ETHER_ALIGNE_SIZE 16 +#ifndef CFG_SH_ETHER_ALIGNE_SIZE +#define CFG_SH_ETHER_ALIGNE_SIZE 16 #endif /* Number of supported ports */ @@ -47,7 +47,7 @@ /* The size of the tx descriptor is determined by how much padding is used. 4, 20, or 52 bytes of padding can be used */ -#define TX_DESC_PADDING (CONFIG_SH_ETHER_ALIGNE_SIZE - 12) +#define TX_DESC_PADDING (CFG_SH_ETHER_ALIGNE_SIZE - 12) /* Tx descriptor. We always use 3 bytes of padding */ struct tx_desc_s { @@ -62,9 +62,9 @@ struct tx_desc_s { /* The size of the rx descriptor is determined by how much padding is used. 4, 20, or 52 bytes of padding can be used */ -#define RX_DESC_PADDING (CONFIG_SH_ETHER_ALIGNE_SIZE - 12) +#define RX_DESC_PADDING (CFG_SH_ETHER_ALIGNE_SIZE - 12) /* aligned cache line size */ -#define RX_BUF_ALIGNE_SIZE (CONFIG_SH_ETHER_ALIGNE_SIZE > 32 ? 64 : 32) +#define RX_BUF_ALIGNE_SIZE (CFG_SH_ETHER_ALIGNE_SIZE > 32 ? 64 : 32) /* Rx descriptor. We always use 4 bytes of padding */ struct rx_desc_s { @@ -388,11 +388,11 @@ enum DMAC_M_BIT { #endif }; -#if CONFIG_SH_ETHER_ALIGNE_SIZE == 64 +#if CFG_SH_ETHER_ALIGNE_SIZE == 64 # define EMDR_DESC EDMR_DL1 -#elif CONFIG_SH_ETHER_ALIGNE_SIZE == 32 +#elif CFG_SH_ETHER_ALIGNE_SIZE == 32 # define EMDR_DESC EDMR_DL0 -#elif CONFIG_SH_ETHER_ALIGNE_SIZE == 16 /* Default */ +#elif CFG_SH_ETHER_ALIGNE_SIZE == 16 /* Default */ # define EMDR_DESC 0 #endif |