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authorVignesh Raghavendra <vigneshr@ti.com>2021-05-10 20:06:09 +0530
committerLokesh Vutla <lokeshvutla@ti.com>2021-05-12 16:36:38 +0530
commit8441d49e60e0095acb1c9574135966ceefec4147 (patch)
tree305168893722aa3b2a503ffae6b942f0d2de23f2 /drivers/net/ti/am65-cpsw-nuss.c
parent9a92851c33e87bbf00e2cb11f16067b87032ed98 (diff)
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net: ti: am65-cpsw-nuss: Prepare to support non primary ext port
CPSW NUSS IP on K3 SoCs can have more than one external port (upto 8) Therefore increase AM65_CPSW_CPSWNU_MAX_PORTS to 9 (8 ext + 1 Root port) as preparation to allow any one of the 8 ports to be used as ethernet interface in U-Boot. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Diffstat (limited to 'drivers/net/ti/am65-cpsw-nuss.c')
-rw-r--r--drivers/net/ti/am65-cpsw-nuss.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/ti/am65-cpsw-nuss.c b/drivers/net/ti/am65-cpsw-nuss.c
index e6954b64b7..9f11ce63b9 100644
--- a/drivers/net/ti/am65-cpsw-nuss.c
+++ b/drivers/net/ti/am65-cpsw-nuss.c
@@ -26,7 +26,7 @@
#include "cpsw_mdio.h"
-#define AM65_CPSW_CPSWNU_MAX_PORTS 2
+#define AM65_CPSW_CPSWNU_MAX_PORTS 9
#define AM65_CPSW_SS_BASE 0x0
#define AM65_CPSW_SGMII_BASE 0x100