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authorkarl beldan <karl.beldan@gmail.com>2016-08-15 17:23:00 +0000
committerJoe Hershberger <joe.hershberger@ni.com>2016-08-22 14:21:09 -0500
commit6202b8f28c10977a9533ba4c49574b136a64ce82 (patch)
treeb961949b017fba14bf43f784d3444dbc84269924 /drivers/net/davinci_emac.c
parenta02c232336c626b96e8473f67471d2b82fc0f9d4 (diff)
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net: davinci_emac: Round up top tx buffer boundaries for dcache ops
check_cache_range() warns that the top boundaries are not properly aligned when flushing or invalidating the buffers and make these operations fail. This gets rid of the remaining warnings: CACHE: Misaligned operation at range Signed-off-by: Karl Beldan <karl.beldan+oss@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
Diffstat (limited to 'drivers/net/davinci_emac.c')
-rw-r--r--drivers/net/davinci_emac.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/davinci_emac.c b/drivers/net/davinci_emac.c
index c591773660..187137c8b4 100644
--- a/drivers/net/davinci_emac.c
+++ b/drivers/net/davinci_emac.c
@@ -637,7 +637,7 @@ static int davinci_eth_send_packet (struct eth_device *dev,
EMAC_CPPI_EOP_BIT);
flush_dcache_range((unsigned long)packet,
- (unsigned long)packet + length);
+ (unsigned long)packet + ALIGN(length, PKTALIGN));
/* Send the packet */
writel(BD_TO_HW((unsigned long)emac_tx_desc), &adap_emac->TX0HDP);