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authorHai Pham <hai.pham.ud@renesas.com>2023-01-26 21:05:56 +0100
committerMarek Vasut <marek.vasut+renesas@gmail.com>2023-02-02 01:49:20 +0100
commit6d7d4c48210046554f63f9d06855b9aa1c0c5dee (patch)
tree2cff1cd6db62de7fed696b162fed02e085cadfb8 /drivers/mmc
parent01cbce80c1815c7aa3efcd421de9e0a52545f09b (diff)
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mmc: renesas-sdhi: Filter out HS400 on M3-W r1.2, V3M, V3H r1.x, D3
Further filter out HS400 support on certain SoCs. Since M3-W r1.2 does not support HS400, drop the calibration table and rename the one for M3-W r1.3 to r8a7796_rev13_calib_table Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Diffstat (limited to 'drivers/mmc')
-rw-r--r--drivers/mmc/renesas-sdhi.c29
1 files changed, 8 insertions, 21 deletions
diff --git a/drivers/mmc/renesas-sdhi.c b/drivers/mmc/renesas-sdhi.c
index 9f8a272d03..3ec0444700 100644
--- a/drivers/mmc/renesas-sdhi.c
+++ b/drivers/mmc/renesas-sdhi.c
@@ -78,14 +78,7 @@ static const u8 r8a7795_calib_table[2][CALIB_TABLE_MAX] = {
16, 16, 17, 17, 17, 17, 17, 18, 18, 18, 18, 19, 20, 21, 22, 22 }
};
-static const u8 r8a7796_rev1_calib_table[2][CALIB_TABLE_MAX] = {
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 2, 3, 4, 9,
- 15, 15, 15, 16, 16, 16, 16, 16, 17, 18, 19, 20, 21, 21, 22, 22 },
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
- 2, 9, 16, 17, 17, 17, 18, 18, 18, 18, 19, 20, 21, 22, 23, 24}
-};
-
-static const u8 r8a7796_rev3_calib_table[2][CALIB_TABLE_MAX] = {
+static const u8 r8a7796_rev13_calib_table[2][CALIB_TABLE_MAX] = {
{ 0, 0, 0, 0, 2, 3, 4, 4, 5, 6, 7, 7, 8, 9, 9, 10,
11, 12, 13, 15, 16, 17, 17, 18, 19, 19, 20, 21, 21, 22, 23, 23 },
{ 1, 2, 2, 3, 4, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12,
@@ -871,12 +864,16 @@ static void renesas_sdhi_filter_caps(struct udevice *dev)
CONFIG_IS_ENABLED(MMC_HS400_SUPPORT)
struct tmio_sd_plat *plat = dev_get_plat(dev);
- /* HS400 is not supported on H3 ES1.x and M3W ES1.0, ES1.1 */
+ /* HS400 is not supported on H3 ES1.x, M3W ES1.[012], V3M, V3H ES1.x, D3 */
if (((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7795) &&
(rmobile_get_cpu_rev_integer() <= 1)) ||
((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) &&
(rmobile_get_cpu_rev_integer() == 1) &&
- (rmobile_get_cpu_rev_fraction() < 2)))
+ (rmobile_get_cpu_rev_fraction() <= 2)) ||
+ (rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77970) ||
+ ((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77980) &&
+ (rmobile_get_cpu_rev_integer() <= 1)) ||
+ (rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77995))
plat->cfg.host_caps &= ~MMC_MODE_HS400;
/* H3 ES2.0, ES3.0 and M3W ES1.2 and M3N bad taps */
@@ -897,16 +894,6 @@ static void renesas_sdhi_filter_caps(struct udevice *dev)
r8a7795_calib_table[!rmobile_is_gen3_mmc0(priv)];
}
- /* M3W ES1.2 can use HS400 with manual adjustment */
- if ((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) &&
- (rmobile_get_cpu_rev_integer() == 1) &&
- (rmobile_get_cpu_rev_fraction() == 2)) {
- priv->adjust_hs400_enable = true;
- priv->adjust_hs400_offset = 3;
- priv->adjust_hs400_calib_table =
- r8a7796_rev1_calib_table[!rmobile_is_gen3_mmc0(priv)];
- }
-
/* M3W ES1.x for x>2 can use HS400 with manual adjustment and taps */
if ((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) &&
(rmobile_get_cpu_rev_integer() == 1) &&
@@ -915,7 +902,7 @@ static void renesas_sdhi_filter_caps(struct udevice *dev)
priv->adjust_hs400_offset = 0;
priv->hs400_bad_tap = BIT(1) | BIT(3) | BIT(5) | BIT(7);
priv->adjust_hs400_calib_table =
- r8a7796_rev3_calib_table[!rmobile_is_gen3_mmc0(priv)];
+ r8a7796_rev13_calib_table[!rmobile_is_gen3_mmc0(priv)];
}
/* M3N can use HS400 with manual adjustment */