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| author | Tien Fong Chee <tien.fong.chee@intel.com> | 2017-12-05 15:57:58 +0800 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2018-04-27 01:04:08 +0200 |
| commit | 4ae87a83a64dbd71a14894114481dd92ffed4fdb (patch) | |
| tree | 34056c550fe797b61b9020bd87643ec28701ee42 /drivers/fpga | |
| parent | d2a1f120cf638fd8a149bc8a46aec961c2fb9406 (diff) | |
| download | u-boot-4ae87a83a64dbd71a14894114481dd92ffed4fdb.tar.gz u-boot-4ae87a83a64dbd71a14894114481dd92ffed4fdb.tar.bz2 u-boot-4ae87a83a64dbd71a14894114481dd92ffed4fdb.zip | |
arm: socfpga: Fix with the correct polling on bit is set
Commit 2baa997240d ("arm: socfpga: Add FPGA driver support for Arria 10")
Polling on wrong cleared bit. Fix with correct polling on bit is set.
Fixes: 2baa997240d ("arm: socfpga: Add FPGA driver support for Arria 10")
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Diffstat (limited to 'drivers/fpga')
| -rw-r--r-- | drivers/fpga/socfpga_arria10.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/fpga/socfpga_arria10.c b/drivers/fpga/socfpga_arria10.c index d5763965dd..685e8e271a 100644 --- a/drivers/fpga/socfpga_arria10.c +++ b/drivers/fpga/socfpga_arria10.c @@ -111,12 +111,12 @@ static int wait_for_nconfig_pin_and_nstatus_pin(void) unsigned long mask = ALT_FPGAMGR_IMGCFG_STAT_F2S_NCONFIG_PIN_SET_MSK | ALT_FPGAMGR_IMGCFG_STAT_F2S_NSTATUS_PIN_SET_MSK; - /* Poll until f2s_nconfig_pin and f2s_nstatus_pin; loop until de-asserted, - * timeout at 1000ms + /* + * Poll until f2s_nconfig_pin and f2s_nstatus_pin; loop until + * de-asserted, timeout at 1000ms */ - return wait_for_bit_le32(&fpga_manager_base->imgcfg_stat, - mask, - false, FPGA_TIMEOUT_MSEC, false); + return wait_for_bit_le32(&fpga_manager_base->imgcfg_stat, mask, + true, FPGA_TIMEOUT_MSEC, false); } static int wait_for_f2s_nstatus_pin(unsigned long value) |