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authorTom Rini <trini@konsulko.com>2022-09-08 08:33:41 -0400
committerTom Rini <trini@konsulko.com>2022-09-08 08:33:41 -0400
commite9de8c8c649044080371399a1ef4923b08632611 (patch)
treededfaadf7f1c9f38f60dfc75c24f5229e0b6c8e8 /drivers/clk
parente3fce5e5604472a20fbce78ca12d07712f2dd86d (diff)
parentd6ff3c9f04f744345fe77a3d82c5b5e0c07c456a (diff)
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Merge tag 'u-boot-stm32-20220907' of https://source.denx.de/u-boot/custodians/u-boot-stm
- simplify the STM32MP15x package parsing code - remove test on CONFIG_DM_REGULATOR in stm32mp1 board and enable CONFIG_DM_REGULATOR for stm32f769-disco - handle ck_usbo_48m clock provided by USBPHYC to fix the command 'usb start' after alignment with Linux kernel v5.19 DT (clocks = <&usbphyc>) - Fix SYS_HZ_CLOCK value for stih410-b2260 board - Switch STMM32MP15x DHSOM to FMC2 EBI driver - Remove hwlocks from pinctrl in STM32MP15x to avoid issue with kernel
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/stm32/clk-stm32mp1.c35
1 files changed, 20 insertions, 15 deletions
diff --git a/drivers/clk/stm32/clk-stm32mp1.c b/drivers/clk/stm32/clk-stm32mp1.c
index 452550066e..4f4524fcb2 100644
--- a/drivers/clk/stm32/clk-stm32mp1.c
+++ b/drivers/clk/stm32/clk-stm32mp1.c
@@ -962,6 +962,24 @@ static ulong stm32mp1_read_pll_freq(struct stm32mp1_clk_priv *priv,
return dfout;
}
+static ulong stm32mp1_clk_get_by_name(const char *name)
+{
+ struct clk clk;
+ struct udevice *dev = NULL;
+ ulong clock = 0;
+
+ if (!uclass_get_device_by_name(UCLASS_CLK, name, &dev)) {
+ if (clk_request(dev, &clk)) {
+ log_err("%s request", name);
+ } else {
+ clk.id = 0;
+ clock = clk_get_rate(&clk);
+ }
+ }
+
+ return clock;
+}
+
static ulong stm32mp1_clk_get(struct stm32mp1_clk_priv *priv, int p)
{
u32 reg;
@@ -1127,24 +1145,11 @@ static ulong stm32mp1_clk_get(struct stm32mp1_clk_priv *priv, int p)
break;
/* other */
case _USB_PHY_48:
- clock = 48000000;
+ clock = stm32mp1_clk_get_by_name("ck_usbo_48m");
break;
case _DSI_PHY:
- {
- struct clk clk;
- struct udevice *dev = NULL;
-
- if (!uclass_get_device_by_name(UCLASS_CLK, "ck_dsi_phy",
- &dev)) {
- if (clk_request(dev, &clk)) {
- log_err("ck_dsi_phy request");
- } else {
- clk.id = 0;
- clock = clk_get_rate(&clk);
- }
- }
+ clock = stm32mp1_clk_get_by_name("ck_dsi_phy");
break;
- }
default:
break;
}