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| author | Bin Meng <bmeng.cn@gmail.com> | 2017-05-31 01:04:13 -0700 |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2017-06-05 08:55:22 +0800 |
| commit | 6702488cfa90831454d83a63eb0b4a0bb82a3a1f (patch) | |
| tree | 49ac3b7269c19883d9a5b44f60e6b45c66e17032 /doc/device-tree-bindings/misc | |
| parent | 455a5a8086b17bd6fb60c86ec34299cae6ce2950 (diff) | |
| download | u-boot-6702488cfa90831454d83a63eb0b4a0bb82a3a1f.tar.gz u-boot-6702488cfa90831454d83a63eb0b4a0bb82a3a1f.tar.bz2 u-boot-6702488cfa90831454d83a63eb0b4a0bb82a3a1f.zip | |
x86: baytrail: Remove "serial-debug-port-*" settings
"serial-debug-port-address" and "serial-debug-port-type" settings
are actually reserved in the FSP UPD data structure. Remove them.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'doc/device-tree-bindings/misc')
| -rw-r--r-- | doc/device-tree-bindings/misc/intel,baytrail-fsp.txt | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/doc/device-tree-bindings/misc/intel,baytrail-fsp.txt b/doc/device-tree-bindings/misc/intel,baytrail-fsp.txt index 07fa46ef7e..f40011edef 100644 --- a/doc/device-tree-bindings/misc/intel,baytrail-fsp.txt +++ b/doc/device-tree-bindings/misc/intel,baytrail-fsp.txt @@ -60,8 +60,6 @@ discovered by the FSP and used to setup main memory. - fsp,igd-dvmt50-pre-alloc - fsp,aperture-size - fsp,gtt-size -- fsp,serial-debug-port-address -- fsp,serial-debug-port-type - fsp,os-selection - fsp,emmc45-retune-timer-value |