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author | Andre Przywara <andre.przywara@arm.com> | 2024-01-30 14:16:42 +0000 |
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committer | Andre Przywara <andre.przywara@arm.com> | 2024-03-03 23:43:43 +0000 |
commit | bc6e594104caaa25b3b2b53ea1db3df69623dc61 (patch) | |
tree | 7c1f0fceae9f91e0f290f06ca0ce6a88ac1744ba /configs | |
parent | 3b08e66f69f3bb8a14f771483d3718f67e22709f (diff) | |
download | u-boot-bc6e594104caaa25b3b2b53ea1db3df69623dc61.tar.gz u-boot-bc6e594104caaa25b3b2b53ea1db3df69623dc61.tar.bz2 u-boot-bc6e594104caaa25b3b2b53ea1db3df69623dc61.zip |
sunxi: H616: Add OrangePi Zero 2W board support
The OrangePi Zero 2W is a tiny development board featuring the Allwinner
H618 SoC, shipping with up to 4GB of LPDDR4 DRAM, a mini-HDMI connector,
two USB Type-C sockets and a 16MB SPI NOR flash.
There is an FPC connector to connect an expansion board, which sports
two more USB Type-A sockets and a 100MBit Ethernet port. Support for
the expansion board is not in the DT yet, probably a DT overlay would
cover this in the future.
Add a defconfig file selecting the right drivers and DRAM options.
Since the .dts file was synced from the Linux kernel repo already, we
just need to add one line to the Makefile to actually build the .dtb.
The DRAM parameters were derived from the values found in the BSP DRAM
drivers on the SPI NOR flash.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Diffstat (limited to 'configs')
-rw-r--r-- | configs/orangepi_zero2w_defconfig | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/configs/orangepi_zero2w_defconfig b/configs/orangepi_zero2w_defconfig new file mode 100644 index 0000000000..5734d9d839 --- /dev/null +++ b/configs/orangepi_zero2w_defconfig @@ -0,0 +1,30 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h618-orangepi-zero2w" +CONFIG_SPL=y +CONFIG_DRAM_SUN50I_H616_DX_ODT=0x07070707 +CONFIG_DRAM_SUN50I_H616_DX_DRI=0x0e0e0e0e +CONFIG_DRAM_SUN50I_H616_CA_DRI=0x0e0e +CONFIG_DRAM_SUN50I_H616_ODT_EN=0xaaaaeeee +CONFIG_DRAM_SUN50I_H616_TPR6=0x48808080 +CONFIG_DRAM_SUN50I_H616_TPR10=0x402f6663 +CONFIG_DRAM_SUN50I_H616_TPR11=0x26262524 +CONFIG_DRAM_SUN50I_H616_TPR12=0x100f100f +CONFIG_MACH_SUN50I_H616=y +CONFIG_SUNXI_DRAM_H616_LPDDR4=y +CONFIG_DRAM_CLK=792 +CONFIG_R_I2C_ENABLE=y +CONFIG_SPL_SPI_SUNXI=y +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_I2C=y +CONFIG_SPL_SYS_I2C_LEGACY=y +CONFIG_SYS_I2C_MVTWSI=y +CONFIG_SYS_I2C_SLAVE=0x7f +CONFIG_SYS_I2C_SPEED=400000 +CONFIG_MTD=y +CONFIG_SPI_FLASH_ZBIT=y +CONFIG_AXP313_POWER=y +CONFIG_SPI=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_MUSB_GADGET=y |