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| author | Quentin Schulz <quentin.schulz@cherry.de> | 2024-06-14 13:04:54 +0200 |
|---|---|---|
| committer | Kever Yang <kever.yang@rock-chips.com> | 2024-07-17 11:54:23 +0800 |
| commit | b91edb9e17760f9be311057e710c21930828dd6e (patch) | |
| tree | 97c0d7299c3abd124d4a14096e3df99315f29bfa /configs | |
| parent | c48a65e0e02626ee62322a170cb31d4d29cc61ef (diff) | |
| download | u-boot-b91edb9e17760f9be311057e710c21930828dd6e.tar.gz u-boot-b91edb9e17760f9be311057e710c21930828dd6e.tar.bz2 u-boot-b91edb9e17760f9be311057e710c21930828dd6e.zip | |
rockchip: ringneck-px30: enable FIT verification in SPL
This enables FIT verification in SPL for its payload (bl31, u-boot.itb,
...). This makes PX30 Ringneck match what happens on other Theobroma
boards.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Diffstat (limited to 'configs')
| -rw-r--r-- | configs/ringneck-px30_defconfig | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/configs/ringneck-px30_defconfig b/configs/ringneck-px30_defconfig index 2ec5f72e47..e7594b7a67 100644 --- a/configs/ringneck-px30_defconfig +++ b/configs/ringneck-px30_defconfig @@ -17,8 +17,10 @@ CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_BOOTSTD_FULL=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_DEFAULT_FDT_FILE="rockchip/px30-ringneck-haikou.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y @@ -111,6 +113,7 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_SPL_TINY_MEMSET=y CONFIG_TPL_TINY_MEMSET=y +# CONFIG_RSA is not set CONFIG_LZO=y CONFIG_ERRNO_STR=y # CONFIG_EFI_LOADER is not set |