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authorTom Rini <trini@konsulko.com>2022-10-20 08:58:05 -0400
committerTom Rini <trini@konsulko.com>2022-10-20 08:58:05 -0400
commit73ceadcd7280cb552119e24ca092d626b12626a6 (patch)
treea09bb39ca939c756772ccce0bba2caaa142dad7d /common
parent3724ddf157aab3bd009c1da234b9a1af1621b544 (diff)
parent843ed983a07ee5d8d4e4ac5baa39fc53f12b5f33 (diff)
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Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi
Beside some rather unexciting sync of the DTs from the kernel tree, and some Kconfig cleanup, there are some improvements for the ARMv5 Allwinner family, to support boards with the F1C200s (64MB DRAM) better. We will get actual board support as soon as the DTs have passed the Linux review process. There is also support for the X96 Mate TV Box, featuring the H616 SoC and a full 4GB of DRAM. Also we found the secret to enable SPI booting on the H616 (pin PC5 must be pulled to GND), so the SPI boot support patch is now good to go. Passed the gitlab CI, plus briefly tested on Pine64-LTS, LicheePi Nano, X96 Mate and OrangePi Zero.
Diffstat (limited to 'common')
-rw-r--r--common/spl/Kconfig6
1 files changed, 6 insertions, 0 deletions
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index f2422d28f9..b1b9e09dc8 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -81,6 +81,7 @@ config SPL_MAX_SIZE
default 0x10000 if ARCH_MX6 && !MX6_OCRAM_256KB
default 0x7fa0 if SUNXI_SRAM_ADDRESS = 0x10000
default 0x7fa0 if SUNXI_SRAM_ADDRESS = 0x20000 && !MACH_SUN50I_H616
+ default 0xbfa0 if MACH_SUN50I_H616
default 0x7000 if RCAR_GEN3
default 0x5fa0 if SUNXI_SRAM_ADDRESS = 0x0
default 0x10000 if ASPEED_AST2600
@@ -353,6 +354,11 @@ config SPL_STACK
default 0x946bb8 if ARCH_MX7
default 0x93ffb8 if ARCH_MX6 && MX6_OCRAM_256KB
default 0x91ffb8 if ARCH_MX6 && !MX6_OCRAM_256KB
+ default 0x118000 if MACH_SUN50I_H6
+ default 0x58000 if MACH_SUN50I_H616
+ default 0x54000 if MACH_SUN50I || MACH_SUN50I_H5
+ default 0x18000 if MACH_SUN9I
+ default 0x8000 if ARCH_SUNXI
help
Address of the start of the stack SPL will use before SDRAM is
initialized.