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| author | Tom Rini <trini@konsulko.com> | 2024-07-23 10:43:58 -0600 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2024-07-23 10:43:58 -0600 |
| commit | f659ba43837e5ae5a35fdff3736c8e13f9062abd (patch) | |
| tree | b14ed130f0e1a7efd85a755f389ac8788fd603c0 /board | |
| parent | 123f6f75dfcb5f88d821e4eb91ddedfb7718d601 (diff) | |
| parent | 3a63612c5f7b20e24a0bfebc5686dc78dfee6510 (diff) | |
| download | u-boot-f659ba43837e5ae5a35fdff3736c8e13f9062abd.tar.gz u-boot-f659ba43837e5ae5a35fdff3736c8e13f9062abd.tar.bz2 u-boot-f659ba43837e5ae5a35fdff3736c8e13f9062abd.zip | |
Merge branch '2024-07-23-remove-or-update-some-platforms'
- Update a few platforms to use DM_I2C finally, and remove a number of
other older platforms.
Diffstat (limited to 'board')
27 files changed, 14 insertions, 2034 deletions
diff --git a/board/beagle/beagle/Kconfig b/board/beagle/beagle/Kconfig deleted file mode 100644 index eade599dc9..0000000000 --- a/board/beagle/beagle/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if TARGET_OMAP3_BEAGLE - -config SYS_BOARD - default "beagle" - -config SYS_VENDOR - default "beagle" - -config SYS_CONFIG_NAME - default "omap3_beagle" - -endif diff --git a/board/beagle/beagle/MAINTAINERS b/board/beagle/beagle/MAINTAINERS deleted file mode 100644 index c7fa87acfc..0000000000 --- a/board/beagle/beagle/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -BEAGLE BOARD -M: Tom Rini <trini@konsulko.com> -S: Maintained -F: board/beagle/beagle/ -F: include/configs/omap3_beagle.h -F: configs/omap3_beagle_defconfig diff --git a/board/beagle/beagle/Makefile b/board/beagle/beagle/Makefile deleted file mode 100644 index fc9288cf18..0000000000 --- a/board/beagle/beagle/Makefile +++ /dev/null @@ -1,7 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# (C) Copyright 2000, 2001, 2002 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. - -obj-y := beagle.o -obj-$(CONFIG_LED_STATUS) += led.o diff --git a/board/beagle/beagle/beagle.c b/board/beagle/beagle/beagle.c deleted file mode 100644 index ac2f89cf21..0000000000 --- a/board/beagle/beagle/beagle.c +++ /dev/null @@ -1,503 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2004-2011 - * Texas Instruments, <www.ti.com> - * - * Author : - * Sunil Kumar <sunilsaini05@gmail.com> - * Shashi Ranjan <shashiranjanmca05@gmail.com> - * - * Derived from Beagle Board and 3430 SDP code by - * Richard Woodruff <r-woodruff2@ti.com> - * Syed Mohammed Khasim <khasim@ti.com> - * - */ -#include <config.h> -#include <bootstage.h> -#include <dm.h> -#include <env.h> -#include <init.h> -#include <net.h> -#include <ns16550.h> -#include <serial.h> -#ifdef CONFIG_LED_STATUS -#include <status_led.h> -#endif -#include <twl4030.h> -#include <asm/global_data.h> -#include <linux/mtd/rawnand.h> -#include <asm/io.h> -#include <asm/arch/mmc_host_def.h> -#include <asm/arch/mux.h> -#include <asm/arch/mem.h> -#include <asm/arch/sys_proto.h> -#include <asm/gpio.h> -#include <asm/mach-types.h> -#include <asm/omap_musb.h> -#include <linux/errno.h> -#include <linux/usb/ch9.h> -#include <linux/usb/gadget.h> -#include <linux/usb/musb.h> -#include "beagle.h" -#include <command.h> - -#define TWL4030_I2C_BUS 0 -#define EXPANSION_EEPROM_I2C_BUS 1 -#define EXPANSION_EEPROM_I2C_ADDRESS 0x50 - -#define TINCANTOOLS_ZIPPY 0x01000100 -#define TINCANTOOLS_ZIPPY2 0x02000100 -#define TINCANTOOLS_TRAINER 0x04000100 -#define TINCANTOOLS_SHOWDOG 0x03000100 -#define KBADC_BEAGLEFPGA 0x01000600 -#define LW_BEAGLETOUCH 0x01000700 -#define BRAINMUX_LCDOG 0x01000800 -#define BRAINMUX_LCDOGTOUCH 0x02000800 -#define BBTOYS_WIFI 0x01000B00 -#define BBTOYS_VGA 0x02000B00 -#define BBTOYS_LCD 0x03000B00 -#define BCT_BRETTL3 0x01000F00 -#define BCT_BRETTL4 0x02000F00 -#define LSR_COM6L_ADPT 0x01001300 -#define BEAGLE_NO_EEPROM 0xffffffff - -DECLARE_GLOBAL_DATA_PTR; - -static struct { - unsigned int device_vendor; - unsigned char revision; - unsigned char content; - char fab_revision[8]; - char env_var[16]; - char env_setting[64]; -} expansion_config; - -/* - * Routine: board_init - * Description: Early hardware init. - */ -int board_init(void) -{ - gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ - /* board id for Linux */ - gd->bd->bi_arch_number = MACH_TYPE_OMAP3_BEAGLE; - /* boot param addr */ - gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); - -#if defined(CONFIG_LED_STATUS) && defined(CONFIG_LED_STATUS_BOOT_ENABLE) - status_led_set(CONFIG_LED_STATUS_BOOT, CONFIG_LED_STATUS_ON); -#endif - - return 0; -} - -#if defined(CONFIG_SPL_OS_BOOT) -int spl_start_uboot(void) -{ - /* break into full u-boot on 'c' */ - if (serial_tstc() && serial_getc() == 'c') - return 1; - - return 0; -} -#endif /* CONFIG_SPL_OS_BOOT */ - -/* - * Routine: get_board_revision - * Description: Detect if we are running on a Beagle revision Ax/Bx, - * C1/2/3, C4, xM Ax/Bx or xM Cx. This can be done by reading - * the level of GPIO173, GPIO172 and GPIO171. This should - * result in - * GPIO173, GPIO172, GPIO171: 1 1 1 => Ax/Bx - * GPIO173, GPIO172, GPIO171: 1 1 0 => C1/2/3 - * GPIO173, GPIO172, GPIO171: 1 0 1 => C4 - * GPIO173, GPIO172, GPIO171: 0 1 0 => xM Cx - * GPIO173, GPIO172, GPIO171: 0 0 0 => xM Ax/Bx - */ -static int get_board_revision(void) -{ - static int revision = -1; - - if (revision == -1) { - if (!gpio_request(171, "rev0") && - !gpio_request(172, "rev1") && - !gpio_request(173, "rev2")) { - gpio_direction_input(171); - gpio_direction_input(172); - gpio_direction_input(173); - - revision = gpio_get_value(173) << 2 | - gpio_get_value(172) << 1 | - gpio_get_value(171); - } else { - printf("Error: unable to acquire board revision GPIOs\n"); - } - } - - return revision; -} - -#ifdef CONFIG_SPL_BUILD -/* - * Routine: get_board_mem_timings - * Description: If we use SPL then there is no x-loader nor config header - * so we have to setup the DDR timings ourself on both banks. - */ -void get_board_mem_timings(struct board_sdrc_timings *timings) -{ - int pop_mfr, pop_id; - - /* - * We need to identify what PoP memory is on the board so that - * we know what timings to use. If we can't identify it then - * we know it's an xM. To map the ID values please see nand_ids.c - */ - identify_nand_chip(&pop_mfr, &pop_id); - - timings->mr = MICRON_V_MR_165; - switch (get_board_revision()) { - case REVISION_C4: - if (pop_mfr == NAND_MFR_STMICRO && pop_id == 0xba) { - /* 512MB DDR */ - timings->mcfg = NUMONYX_V_MCFG_165(512 << 20); - timings->ctrla = NUMONYX_V_ACTIMA_165; - timings->ctrlb = NUMONYX_V_ACTIMB_165; - timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; - break; - } else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xba) { - /* Beagleboard Rev C4, 512MB Nand/256MB DDR*/ - timings->mcfg = MICRON_V_MCFG_165(128 << 20); - timings->ctrla = MICRON_V_ACTIMA_165; - timings->ctrlb = MICRON_V_ACTIMB_165; - timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; - break; - } else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xbc) { - /* Beagleboard Rev C5, 256MB DDR */ - timings->mcfg = MICRON_V_MCFG_200(256 << 20); - timings->ctrla = MICRON_V_ACTIMA_200; - timings->ctrlb = MICRON_V_ACTIMB_200; - timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; - break; - } - case REVISION_XM_AB: - case REVISION_XM_C: - if (pop_mfr == 0) { - /* 256MB DDR */ - timings->mcfg = MICRON_V_MCFG_200(256 << 20); - timings->ctrla = MICRON_V_ACTIMA_200; - timings->ctrlb = MICRON_V_ACTIMB_200; - timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; - } else { - /* 512MB DDR */ - timings->mcfg = NUMONYX_V_MCFG_165(512 << 20); - timings->ctrla = NUMONYX_V_ACTIMA_165; - timings->ctrlb = NUMONYX_V_ACTIMB_165; - timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; - } - break; - default: - /* Assume 128MB and Micron/165MHz timings to be safe */ - timings->mcfg = MICRON_V_MCFG_165(128 << 20); - timings->ctrla = MICRON_V_ACTIMA_165; - timings->ctrlb = MICRON_V_ACTIMB_165; - timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; - } -} -#endif - -/* - * Routine: get_expansion_id - * Description: This function checks for expansion board by checking I2C - * bus 1 for the availability of an AT24C01B serial EEPROM. - * returns the device_vendor field from the EEPROM - */ -static unsigned int get_expansion_id(void) -{ - i2c_set_bus_num(EXPANSION_EEPROM_I2C_BUS); - - /* return BEAGLE_NO_EEPROM if eeprom doesn't respond */ - if (i2c_probe(EXPANSION_EEPROM_I2C_ADDRESS) == 1) { - i2c_set_bus_num(TWL4030_I2C_BUS); - return BEAGLE_NO_EEPROM; - } - - /* read configuration data */ - i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 1, (u8 *)&expansion_config, - sizeof(expansion_config)); - - /* retry reading configuration data with 16bit addressing */ - if ((expansion_config.device_vendor == 0xFFFFFF00) || - (expansion_config.device_vendor == 0xFFFFFFFF)) { - printf("EEPROM is blank or 8bit addressing failed: retrying with 16bit:\n"); - i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 2, (u8 *)&expansion_config, - sizeof(expansion_config)); - } - - i2c_set_bus_num(TWL4030_I2C_BUS); - - return expansion_config.device_vendor; -} - -#ifdef CONFIG_VIDEO_OMAP3 -/* - * Configure DSS to display background color on DVID - * Configure VENC to display color bar on S-Video - */ -static void beagle_display_init(void) -{ - omap3_dss_venc_config(&venc_config_std_tv, VENC_HEIGHT, VENC_WIDTH); - switch (get_board_revision()) { - case REVISION_AXBX: - case REVISION_CX: - case REVISION_C4: - omap3_dss_panel_config(&dvid_cfg); - break; - case REVISION_XM_AB: - case REVISION_XM_C: - default: - omap3_dss_panel_config(&dvid_cfg_xm); - break; - } -} - -/* - * Enable DVI power - */ -static void beagle_dvi_pup(void) -{ - uchar val; - - switch (get_board_revision()) { - case REVISION_AXBX: - case REVISION_CX: - case REVISION_C4: - gpio_request(170, "dvi"); - gpio_direction_output(170, 0); - gpio_set_value(170, 1); - break; - case REVISION_XM_AB: - case REVISION_XM_C: - default: - #define GPIODATADIR1 (TWL4030_BASEADD_GPIO+3) - #define GPIODATAOUT1 (TWL4030_BASEADD_GPIO+6) - - i2c_read(TWL4030_CHIP_GPIO, GPIODATADIR1, 1, &val, 1); - val |= 4; - i2c_write(TWL4030_CHIP_GPIO, GPIODATADIR1, 1, &val, 1); - - i2c_read(TWL4030_CHIP_GPIO, GPIODATAOUT1, 1, &val, 1); - val |= 4; - i2c_write(TWL4030_CHIP_GPIO, GPIODATAOUT1, 1, &val, 1); - break; - } -} -#endif - -/* - * Routine: misc_init_r - * Description: Configure board specific parts - */ -int misc_init_r(void) -{ - struct gpio *gpio5_base = (struct gpio *)OMAP34XX_GPIO5_BASE; - struct gpio *gpio6_base = (struct gpio *)OMAP34XX_GPIO6_BASE; - struct control_prog_io *prog_io_base = (struct control_prog_io *)OMAP34XX_CTRL_BASE; - bool generate_fake_mac = false; - u32 value; - - /* Enable i2c2 pullup resisters */ - value = readl(&prog_io_base->io1); - value &= ~(PRG_I2C2_PULLUPRESX); - writel(value, &prog_io_base->io1); - - switch (get_board_revision()) { - case REVISION_AXBX: - printf("Beagle Rev Ax/Bx\n"); - env_set("beaglerev", "AxBx"); - break; - case REVISION_CX: - printf("Beagle Rev C1/C2/C3\n"); - env_set("beaglerev", "Cx"); - MUX_BEAGLE_C(); - break; - case REVISION_C4: - printf("Beagle Rev C4\n"); - env_set("beaglerev", "C4"); - MUX_BEAGLE_C(); - /* Set VAUX2 to 1.8V for EHCI PHY */ - twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED, - TWL4030_PM_RECEIVER_VAUX2_VSEL_18, - TWL4030_PM_RECEIVER_VAUX2_DEV_GRP, - TWL4030_PM_RECEIVER_DEV_GRP_P1); - break; - case REVISION_XM_AB: - printf("Beagle xM Rev A/B\n"); - env_set("beaglerev", "xMAB"); - MUX_BEAGLE_XM(); - /* Set VAUX2 to 1.8V for EHCI PHY */ - twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED, - TWL4030_PM_RECEIVER_VAUX2_VSEL_18, - TWL4030_PM_RECEIVER_VAUX2_DEV_GRP, - TWL4030_PM_RECEIVER_DEV_GRP_P1); - generate_fake_mac = true; - break; - case REVISION_XM_C: - printf("Beagle xM Rev C\n"); - env_set("beaglerev", "xMC"); - MUX_BEAGLE_XM(); - /* Set VAUX2 to 1.8V for EHCI PHY */ - twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED, - TWL4030_PM_RECEIVER_VAUX2_VSEL_18, - TWL4030_PM_RECEIVER_VAUX2_DEV_GRP, - TWL4030_PM_RECEIVER_DEV_GRP_P1); - generate_fake_mac = true; - break; - default: - printf("Beagle unknown 0x%02x\n", get_board_revision()); - MUX_BEAGLE_XM(); - /* Set VAUX2 to 1.8V for EHCI PHY */ - twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED, - TWL4030_PM_RECEIVER_VAUX2_VSEL_18, - TWL4030_PM_RECEIVER_VAUX2_DEV_GRP, - TWL4030_PM_RECEIVER_DEV_GRP_P1); - generate_fake_mac = true; - } - - switch (get_expansion_id()) { - case TINCANTOOLS_ZIPPY: - printf("Recognized Tincantools Zippy board (rev %d %s)\n", - expansion_config.revision, - expansion_config.fab_revision); - MUX_TINCANTOOLS_ZIPPY(); - env_set("buddy", "zippy"); - break; - case TINCANTOOLS_ZIPPY2: - printf("Recognized Tincantools Zippy2 board (rev %d %s)\n", - expansion_config.revision, - expansion_config.fab_revision); - MUX_TINCANTOOLS_ZIPPY(); - env_set("buddy", "zippy2"); - break; - case TINCANTOOLS_TRAINER: - printf("Recognized Tincantools Trainer board (rev %d %s)\n", - expansion_config.revision, - expansion_config.fab_revision); - MUX_TINCANTOOLS_ZIPPY(); - MUX_TINCANTOOLS_TRAINER(); - env_set("buddy", "trainer"); - break; - case TINCANTOOLS_SHOWDOG: - printf("Recognized Tincantools Showdow board (rev %d %s)\n", - expansion_config.revision, - expansion_config.fab_revision); - /* Place holder for DSS2 definition for showdog lcd */ - env_set("defaultdisplay", "showdoglcd"); - env_set("buddy", "showdog"); - break; - case KBADC_BEAGLEFPGA: - printf("Recognized KBADC Beagle FPGA board\n"); - MUX_KBADC_BEAGLEFPGA(); - env_set("buddy", "beaglefpga"); - break; - case LW_BEAGLETOUCH: - printf("Recognized Liquidware BeagleTouch board\n"); - env_set("buddy", "beagletouch"); - break; - case BRAINMUX_LCDOG: - printf("Recognized Brainmux LCDog board\n"); - env_set("buddy", "lcdog"); - break; - case BRAINMUX_LCDOGTOUCH: - printf("Recognized Brainmux LCDog Touch board\n"); - env_set("buddy", "lcdogtouch"); - break; - case BBTOYS_WIFI: - printf("Recognized BeagleBoardToys WiFi board\n"); - MUX_BBTOYS_WIFI() - env_set("buddy", "bbtoys-wifi"); - break; - case BBTOYS_VGA: - printf("Recognized BeagleBoardToys VGA board\n"); - break; - case BBTOYS_LCD: - printf("Recognized BeagleBoardToys LCD board\n"); - break; - case BCT_BRETTL3: - printf("Recognized bct electronic GmbH brettl3 board\n"); - break; - case BCT_BRETTL4: - printf("Recognized bct electronic GmbH brettl4 board\n"); - break; - case LSR_COM6L_ADPT: - printf("Recognized LSR COM6L Adapter Board\n"); - MUX_BBTOYS_WIFI() - env_set("buddy", "lsr-com6l-adpt"); - break; - case BEAGLE_NO_EEPROM: - printf("No EEPROM on expansion board\n"); - env_set("buddy", "none"); - break; - default: - printf("Unrecognized expansion board: %x\n", - expansion_config.device_vendor); - env_set("buddy", "unknown"); - } - - if (expansion_config.content == 1) - env_set(expansion_config.env_var, expansion_config.env_setting); - - twl4030_power_init(); - twl4030_power_mmc_init(0); - - switch (get_board_revision()) { - case REVISION_XM_AB: - twl4030_led_init(TWL4030_LED_LEDEN_LEDBON); - break; - default: - twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON); - break; - } - - /* Set GPIO states before they are made outputs */ - writel(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1, - &gpio6_base->setdataout); - writel(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 | - GPIO15 | GPIO14 | GPIO13 | GPIO12, &gpio5_base->setdataout); - - /* Configure GPIOs to output */ - writel(~(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1), &gpio6_base->oe); - writel(~(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 | - GPIO15 | GPIO14 | GPIO13 | GPIO12), &gpio5_base->oe); - - omap_die_id_display(); - -#ifdef CONFIG_VIDEO_OMAP3 - beagle_dvi_pup(); - beagle_display_init(); - omap3_dss_enable(); -#endif - - if (generate_fake_mac) - omap_die_id_usbethaddr(); - -#if defined(CONFIG_MTDIDS_DEFAULT) && defined(CONFIG_MTDPARTS_DEFAULT) - if (strlen(CONFIG_MTDIDS_DEFAULT)) - env_set("mtdids", CONFIG_MTDIDS_DEFAULT); - - if (strlen(CONFIG_MTDPARTS_DEFAULT)) - env_set("mtdparts", CONFIG_MTDPARTS_DEFAULT); -#endif - - return 0; -} - -/* - * Routine: set_muxconf_regs - * Description: Setting up the configuration Mux registers specific to the - * hardware. Many pins need to be moved from protect to primary - * mode. - */ -void set_muxconf_regs(void) -{ - MUX_BEAGLE(); -} diff --git a/board/beagle/beagle/beagle.h b/board/beagle/beagle/beagle.h deleted file mode 100644 index ce78ea661b..0000000000 --- a/board/beagle/beagle/beagle.h +++ /dev/null @@ -1,545 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2008 - * Dirk Behme <dirk.behme@gmail.com> - */ -#ifndef _BEAGLE_H_ -#define _BEAGLE_H_ - -#include <asm/arch/dss.h> - -const omap3_sysinfo sysinfo = { - DDR_STACKED, - "OMAP3 Beagle board", -#if defined(CONFIG_ENV_IS_IN_ONENAND) - "OneNAND", -#else - "NAND", -#endif -}; - -/* BeagleBoard revisions */ -#define REVISION_AXBX 0x7 -#define REVISION_CX 0x6 -#define REVISION_C4 0x5 -#define REVISION_XM_AB 0x0 -#define REVISION_XM_C 0x2 - -/* - * IEN - Input Enable - * IDIS - Input Disable - * PTD - Pull type Down - * PTU - Pull type Up - * DIS - Pull type selection is inactive - * EN - Pull type selection is active - * M0 - Mode 0 - * The commented string gives the final mux configuration for that pin - */ -#define MUX_BEAGLE() \ - /*SDRC*/\ - MUX_VAL(CP(SDRC_D0), (IEN | PTD | DIS | M0)) /*SDRC_D0*/\ - MUX_VAL(CP(SDRC_D1), (IEN | PTD | DIS | M0)) /*SDRC_D1*/\ - MUX_VAL(CP(SDRC_D2), (IEN | PTD | DIS | M0)) /*SDRC_D2*/\ - MUX_VAL(CP(SDRC_D3), (IEN | PTD | DIS | M0)) /*SDRC_D3*/\ - MUX_VAL(CP(SDRC_D4), (IEN | PTD | DIS | M0)) /*SDRC_D4*/\ - MUX_VAL(CP(SDRC_D5), (IEN | PTD | DIS | M0)) /*SDRC_D5*/\ - MUX_VAL(CP(SDRC_D6), (IEN | PTD | DIS | M0)) /*SDRC_D6*/\ - MUX_VAL(CP(SDRC_D7), (IEN | PTD | DIS | M0)) /*SDRC_D7*/\ - MUX_VAL(CP(SDRC_D8), (IEN | PTD | DIS | M0)) /*SDRC_D8*/\ - MUX_VAL(CP(SDRC_D9), (IEN | PTD | DIS | M0)) /*SDRC_D9*/\ - MUX_VAL(CP(SDRC_D10), (IEN | PTD | DIS | M0)) /*SDRC_D10*/\ - MUX_VAL(CP(SDRC_D11), (IEN | PTD | DIS | M0)) /*SDRC_D11*/\ - MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) /*SDRC_D12*/\ - MUX_VAL(CP(SDRC_D13), (IEN | PTD | DIS | M0)) /*SDRC_D13*/\ - MUX_VAL(CP(SDRC_D14), (IEN | PTD | DIS | M0)) /*SDRC_D14*/\ - MUX_VAL(CP(SDRC_D15), (IEN | PTD | DIS | M0)) /*SDRC_D15*/\ - MUX_VAL(CP(SDRC_D16), (IEN | PTD | DIS | M0)) /*SDRC_D16*/\ - MUX_VAL(CP(SDRC_D17), (IEN | PTD | DIS | M0)) /*SDRC_D17*/\ - MUX_VAL(CP(SDRC_D18), (IEN | PTD | DIS | M0)) /*SDRC_D18*/\ - MUX_VAL(CP(SDRC_D19), (IEN | PTD | DIS | M0)) /*SDRC_D19*/\ - MUX_VAL(CP(SDRC_D20), (IEN | PTD | DIS | M0)) /*SDRC_D20*/\ - MUX_VAL(CP(SDRC_D21), (IEN | PTD | DIS | M0)) /*SDRC_D21*/\ - MUX_VAL(CP(SDRC_D22), (IEN | PTD | DIS | M0)) /*SDRC_D22*/\ - MUX_VAL(CP(SDRC_D23), (IEN | PTD | DIS | M0)) /*SDRC_D23*/\ - MUX_VAL(CP(SDRC_D24), (IEN | PTD | DIS | M0)) /*SDRC_D24*/\ - MUX_VAL(CP(SDRC_D25), (IEN | PTD | DIS | M0)) /*SDRC_D25*/\ - MUX_VAL(CP(SDRC_D26), (IEN | PTD | DIS | M0)) /*SDRC_D26*/\ - MUX_VAL(CP(SDRC_D27), (IEN | PTD | DIS | M0)) /*SDRC_D27*/\ - MUX_VAL(CP(SDRC_D28), (IEN | PTD | DIS | M0)) /*SDRC_D28*/\ - MUX_VAL(CP(SDRC_D29), (IEN | PTD | DIS | M0)) /*SDRC_D29*/\ - MUX_VAL(CP(SDRC_D30), (IEN | PTD | DIS | M0)) /*SDRC_D30*/\ - MUX_VAL(CP(SDRC_D31), (IEN | PTD | DIS | M0)) /*SDRC_D31*/\ - MUX_VAL(CP(SDRC_CLK), (IEN | PTD | DIS | M0)) /*SDRC_CLK*/\ - MUX_VAL(CP(SDRC_DQS0), (IEN | PTD | DIS | M0)) /*SDRC_DQS0*/\ - MUX_VAL(CP(SDRC_DQS1), (IEN | PTD | DIS | M0)) /*SDRC_DQS1*/\ - MUX_VAL(CP(SDRC_DQS2), (IEN | PTD | DIS | M0)) /*SDRC_DQS2*/\ - MUX_VAL(CP(SDRC_DQS3), (IEN | PTD | DIS | M0)) /*SDRC_DQS3*/\ - /*GPMC*/\ - MUX_VAL(CP(GPMC_A1), (IDIS | PTD | DIS | M0)) /*GPMC_A1*/\ - MUX_VAL(CP(GPMC_A2), (IDIS | PTD | DIS | M0)) /*GPMC_A2*/\ - MUX_VAL(CP(GPMC_A3), (IDIS | PTD | DIS | M0)) /*GPMC_A3*/\ - MUX_VAL(CP(GPMC_A4), (IDIS | PTD | DIS | M0)) /*GPMC_A4*/\ - MUX_VAL(CP(GPMC_A5), (IDIS | PTD | DIS | M0)) /*GPMC_A5*/\ - MUX_VAL(CP(GPMC_A6), (IDIS | PTD | DIS | M0)) /*GPMC_A6*/\ - MUX_VAL(CP(GPMC_A7), (IDIS | PTD | DIS | M0)) /*GPMC_A7*/\ - MUX_VAL(CP(GPMC_A8), (IDIS | PTD | DIS | M0)) /*GPMC_A8*/\ - MUX_VAL(CP(GPMC_A9), (IDIS | PTD | DIS | M0)) /*GPMC_A9*/\ - MUX_VAL(CP(GPMC_A10), (IDIS | PTD | DIS | M0)) /*GPMC_A10*/\ - MUX_VAL(CP(GPMC_D0), (IEN | PTD | DIS | M0)) /*GPMC_D0*/\ - MUX_VAL(CP(GPMC_D1), (IEN | PTD | DIS | M0)) /*GPMC_D1*/\ - MUX_VAL(CP(GPMC_D2), (IEN | PTD | DIS | M0)) /*GPMC_D2*/\ - MUX_VAL(CP(GPMC_D3), (IEN | PTD | DIS | M0)) /*GPMC_D3*/\ - MUX_VAL(CP(GPMC_D4), (IEN | PTD | DIS | M0)) /*GPMC_D4*/\ - MUX_VAL(CP(GPMC_D5), (IEN | PTD | DIS | M0)) /*GPMC_D5*/\ - MUX_VAL(CP(GPMC_D6), (IEN | PTD | DIS | M0)) /*GPMC_D6*/\ - MUX_VAL(CP(GPMC_D7), (IEN | PTD | DIS | M0)) /*GPMC_D7*/\ - MUX_VAL(CP(GPMC_D8), (IEN | PTD | DIS | M0)) /*GPMC_D8*/\ - MUX_VAL(CP(GPMC_D9), (IEN | PTD | DIS | M0)) /*GPMC_D9*/\ - MUX_VAL(CP(GPMC_D10), (IEN | PTD | DIS | M0)) /*GPMC_D10*/\ - MUX_VAL(CP(GPMC_D11), (IEN | PTD | DIS | M0)) /*GPMC_D11*/\ - MUX_VAL(CP(GPMC_D12), (IEN | PTD | DIS | M0)) /*GPMC_D12*/\ - MUX_VAL(CP(GPMC_D13), (IEN | PTD | DIS | M0)) /*GPMC_D13*/\ - MUX_VAL(CP(GPMC_D14), (IEN | PTD | DIS | M0)) /*GPMC_D14*/\ - MUX_VAL(CP(GPMC_D15), (IEN | PTD | DIS | M0)) /*GPMC_D15*/\ - MUX_VAL(CP(GPMC_NCS0), (IDIS | PTU | EN | M0)) /*GPMC_nCS0*/\ - MUX_VAL(CP(GPMC_NCS1), (IDIS | PTU | EN | M0)) /*GPMC_nCS1*/\ - MUX_VAL(CP(GPMC_NCS2), (IDIS | PTU | EN | M0)) /*GPMC_nCS2*/\ - MUX_VAL(CP(GPMC_NCS3), (IDIS | PTU | EN | M0)) /*GPMC_nCS3*/\ - MUX_VAL(CP(GPMC_NCS4), (IDIS | PTU | EN | M0)) /*GPMC_nCS4*/\ - MUX_VAL(CP(GPMC_NCS5), (IDIS | PTD | DIS | M0)) /*GPMC_nCS5*/\ - MUX_VAL(CP(GPMC_NCS6), (IEN | PTD | DIS | M1)) /*SYS_nDMA_REQ2*/\ - MUX_VAL(CP(GPMC_NCS7), (IEN | PTU | EN | M1)) /*SYS_nDMA_REQ3*/\ - MUX_VAL(CP(GPMC_NBE1), (IEN | PTD | DIS | M0)) /*GPMC_nBE1*/\ - MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | EN | M0)) /*GPMC_WAIT2*/\ - MUX_VAL(CP(GPMC_WAIT3), (IEN | PTU | EN | M0)) /*GPMC_WAIT3*/\ - MUX_VAL(CP(GPMC_CLK), (IDIS | PTD | DIS | M0)) /*GPMC_CLK*/\ - MUX_VAL(CP(GPMC_NADV_ALE), (IDIS | PTD | DIS | M0)) /*GPMC_nADV_ALE*/\ - MUX_VAL(CP(GPMC_NOE), (IDIS | PTD | DIS | M0)) /*GPMC_nOE*/\ - MUX_VAL(CP(GPMC_NWE), (IDIS | PTD | DIS | M0)) /*GPMC_nWE*/\ - MUX_VAL(CP(GPMC_NBE0_CLE), (IDIS | PTD | DIS | M0)) /*GPMC_nBE0_CLE*/\ - MUX_VAL(CP(GPMC_NWP), (IEN | PTD | DIS | M0)) /*GPMC_nWP*/\ - MUX_VAL(CP(GPMC_WAIT0), (IEN | PTU | EN | M0)) /*GPMC_WAIT0*/\ - MUX_VAL(CP(GPMC_WAIT1), (IEN | PTU | EN | M0)) /*GPMC_WAIT1*/\ - /*DSS*/\ - MUX_VAL(CP(DSS_PCLK), (IDIS | PTD | DIS | M0)) /*DSS_PCLK*/\ - MUX_VAL(CP(DSS_HSYNC), (IDIS | PTD | DIS | M0)) /*DSS_HSYNC*/\ - MUX_VAL(CP(DSS_VSYNC), (IDIS | PTD | DIS | M0)) /*DSS_VSYNC*/\ - MUX_VAL(CP(DSS_ACBIAS), (IDIS | PTD | DIS | M0)) /*DSS_ACBIAS*/\ - MUX_VAL(CP(DSS_DATA0), (IDIS | PTD | DIS | M0)) /*DSS_DATA0*/\ - MUX_VAL(CP(DSS_DATA1), (IDIS | PTD | DIS | M0)) /*DSS_DATA1*/\ - MUX_VAL(CP(DSS_DATA2), (IDIS | PTD | DIS | M0)) /*DSS_DATA2*/\ - MUX_VAL(CP(DSS_DATA3), (IDIS | PTD | DIS | M0)) /*DSS_DATA3*/\ - MUX_VAL(CP(DSS_DATA4), (IDIS | PTD | DIS | M0)) /*DSS_DATA4*/\ - MUX_VAL(CP(DSS_DATA5), (IDIS | PTD | DIS | M0)) /*DSS_DATA5*/\ - MUX_VAL(CP(DSS_DATA6), (IDIS | PTD | DIS | M0)) /*DSS_DATA6*/\ - MUX_VAL(CP(DSS_DATA7), (IDIS | PTD | DIS | M0)) /*DSS_DATA7*/\ - MUX_VAL(CP(DSS_DATA8), (IDIS | PTD | DIS | M0)) /*DSS_DATA8*/\ - MUX_VAL(CP(DSS_DATA9), (IDIS | PTD | DIS | M0)) /*DSS_DATA9*/\ - MUX_VAL(CP(DSS_DATA10), (IDIS | PTD | DIS | M0)) /*DSS_DATA10*/\ - MUX_VAL(CP(DSS_DATA11), (IDIS | PTD | DIS | M0)) /*DSS_DATA11*/\ - MUX_VAL(CP(DSS_DATA12), (IDIS | PTD | DIS | M0)) /*DSS_DATA12*/\ - MUX_VAL(CP(DSS_DATA13), (IDIS | PTD | DIS | M0)) /*DSS_DATA13*/\ - MUX_VAL(CP(DSS_DATA14), (IDIS | PTD | DIS | M0)) /*DSS_DATA14*/\ - MUX_VAL(CP(DSS_DATA15), (IDIS | PTD | DIS | M0)) /*DSS_DATA15*/\ - MUX_VAL(CP(DSS_DATA16), (IDIS | PTD | DIS | M0)) /*DSS_DATA16*/\ - MUX_VAL(CP(DSS_DATA17), (IDIS | PTD | DIS | M0)) /*DSS_DATA17*/\ - MUX_VAL(CP(DSS_DATA18), (IDIS | PTD | DIS | M0)) /*DSS_DATA18*/\ - MUX_VAL(CP(DSS_DATA19), (IDIS | PTD | DIS | M0)) /*DSS_DATA19*/\ - MUX_VAL(CP(DSS_DATA20), (IDIS | PTD | DIS | M0)) /*DSS_DATA20*/\ - MUX_VAL(CP(DSS_DATA21), (IDIS | PTD | DIS | M0)) /*DSS_DATA21*/\ - MUX_VAL(CP(DSS_DATA22), (IDIS | PTD | DIS | M0)) /*DSS_DATA22*/\ - MUX_VAL(CP(DSS_DATA23), (IDIS | PTD | DIS | M0)) /*DSS_DATA23*/\ - /*CAMERA*/\ - MUX_VAL(CP(CAM_HS), (IEN | PTU | EN | M0)) /*CAM_HS */\ - MUX_VAL(CP(CAM_VS), (IEN | PTU | EN | M0)) /*CAM_VS */\ - MUX_VAL(CP(CAM_XCLKA), (IDIS | PTD | DIS | M0)) /*CAM_XCLKA*/\ - MUX_VAL(CP(CAM_PCLK), (IEN | PTU | EN | M0)) /*CAM_PCLK*/\ - MUX_VAL(CP(CAM_FLD), (IDIS | PTD | DIS | M4)) /*GPIO_98*/\ - MUX_VAL(CP(CAM_D0), (IEN | PTD | DIS | M0)) /*CAM_D0*/\ - MUX_VAL(CP(CAM_D1), (IEN | PTD | DIS | M0)) /*CAM_D1*/\ - MUX_VAL(CP(CAM_D2), (IEN | PTD | DIS | M0)) /*CAM_D2*/\ - MUX_VAL(CP(CAM_D3), (IEN | PTD | DIS | M0)) /*CAM_D3*/\ - MUX_VAL(CP(CAM_D4), (IEN | PTD | DIS | M0)) /*CAM_D4*/\ - MUX_VAL(CP(CAM_D5), (IEN | PTD | DIS | M0)) /*CAM_D5*/\ - MUX_VAL(CP(CAM_D6), (IEN | PTD | DIS | M0)) /*CAM_D6*/\ - MUX_VAL(CP(CAM_D7), (IEN | PTD | DIS | M0)) /*CAM_D7*/\ - MUX_VAL(CP(CAM_D8), (IEN | PTD | DIS | M0)) /*CAM_D8*/\ - MUX_VAL(CP(CAM_D9), (IEN | PTD | DIS | M0)) /*CAM_D9*/\ - MUX_VAL(CP(CAM_D10), (IEN | PTD | DIS | M0)) /*CAM_D10*/\ - MUX_VAL(CP(CAM_D11), (IEN | PTD | DIS | M0)) /*CAM_D11*/\ - MUX_VAL(CP(CAM_XCLKB), (IDIS | PTD | DIS | M0)) /*CAM_XCLKB*/\ - MUX_VAL(CP(CAM_WEN), (IEN | PTD | DIS | M4)) /*GPIO_167*/\ - MUX_VAL(CP(CAM_STROBE), (IDIS | PTD | DIS | M0)) /*CAM_STROBE*/\ - MUX_VAL(CP(CSI2_DX0), (IEN | PTD | DIS | M0)) /*CSI2_DX0*/\ - MUX_VAL(CP(CSI2_DY0), (IEN | PTD | DIS | M0)) /*CSI2_DY0*/\ - MUX_VAL(CP(CSI2_DX1), (IEN | PTD | DIS | M0)) /*CSI2_DX1*/\ - MUX_VAL(CP(CSI2_DY1), (IEN | PTD | DIS | M0)) /*CSI2_DY1*/\ - /*Audio Interface */\ - MUX_VAL(CP(MCBSP2_FSX), (IEN | PTD | DIS | M0)) /*McBSP2_FSX*/\ - MUX_VAL(CP(MCBSP2_CLKX), (IEN | PTD | DIS | M0)) /*McBSP2_CLKX*/\ - MUX_VAL(CP(MCBSP2_DR), (IEN | PTD | DIS | M0)) /*McBSP2_DR*/\ - MUX_VAL(CP(MCBSP2_DX), (IDIS | PTD | DIS | M0)) /*McBSP2_DX*/\ - /*Expansion card */\ - MUX_VAL(CP(MMC1_CLK), (IDIS | PTU | EN | M0)) /*MMC1_CLK*/\ - MUX_VAL(CP(MMC1_CMD), (IEN | PTU | EN | M0)) /*MMC1_CMD*/\ - MUX_VAL(CP(MMC1_DAT0), (IEN | PTU | EN | M0)) /*MMC1_DAT0*/\ - MUX_VAL(CP(MMC1_DAT1), (IEN | PTU | EN | M0)) /*MMC1_DAT1*/\ - MUX_VAL(CP(MMC1_DAT2), (IEN | PTU | EN | M0)) /*MMC1_DAT2*/\ - MUX_VAL(CP(MMC1_DAT3), (IEN | PTU | EN | M0)) /*MMC1_DAT3*/\ - MUX_VAL(CP(MMC1_DAT4), (IEN | PTU | EN | M0)) /*MMC1_DAT4*/\ - MUX_VAL(CP(MMC1_DAT5), (IEN | PTU | EN | M0)) /*MMC1_DAT5*/\ - MUX_VAL(CP(MMC1_DAT6), (IEN | PTU | EN | M0)) /*MMC1_DAT6*/\ - MUX_VAL(CP(MMC1_DAT7), (IEN | PTU | EN | M0)) /*MMC1_DAT7*/\ - /*Wireless LAN */\ - MUX_VAL(CP(MMC2_CLK), (IEN | PTU | EN | M4)) /*GPIO_130*/\ - MUX_VAL(CP(MMC2_CMD), (IEN | PTU | EN | M4)) /*GPIO_131*/\ - MUX_VAL(CP(MMC2_DAT0), (IEN | PTU | EN | M4)) /*GPIO_132*/\ - MUX_VAL(CP(MMC2_DAT1), (IEN | PTU | EN | M4)) /*GPIO_133*/\ - MUX_VAL(CP(MMC2_DAT2), (IEN | PTU | EN | M4)) /*GPIO_134*/\ - MUX_VAL(CP(MMC2_DAT3), (IEN | PTU | EN | M4)) /*GPIO_135*/\ - MUX_VAL(CP(MMC2_DAT4), (IEN | PTU | EN | M4)) /*GPIO_136*/\ - MUX_VAL(CP(MMC2_DAT5), (IEN | PTU | EN | M4)) /*GPIO_137*/\ - MUX_VAL(CP(MMC2_DAT6), (IEN | PTU | EN | M4)) /*GPIO_138*/\ - MUX_VAL(CP(MMC2_DAT7), (IEN | PTU | EN | M4)) /*GPIO_139*/\ - /*Bluetooth*/\ - MUX_VAL(CP(MCBSP3_DX), (IEN | PTD | DIS | M1)) /*UART2_CTS*/\ - MUX_VAL(CP(MCBSP3_DR), (IDIS | PTD | DIS | M1)) /*UART2_RTS*/\ - MUX_VAL(CP(MCBSP3_CLKX), (IDIS | PTD | DIS | M1)) /*UART2_TX*/\ - MUX_VAL(CP(MCBSP3_FSX), (IEN | PTD | DIS | M1)) /*UART2_RX*/\ - MUX_VAL(CP(UART2_CTS), (IEN | PTD | DIS | M4)) /*GPIO_144*/\ - MUX_VAL(CP(UART2_RTS), (IEN | PTD | DIS | M4)) /*GPIO_145*/\ - MUX_VAL(CP(UART2_TX), (IEN | PTD | DIS | M4)) /*GPIO_146*/\ - MUX_VAL(CP(UART2_RX), (IEN | PTD | DIS | M4)) /*GPIO_147*/\ - /*Modem Interface */\ - MUX_VAL(CP(UART1_TX), (IDIS | PTD | DIS | M0)) /*UART1_TX*/\ - MUX_VAL(CP(UART1_RTS), (IDIS | PTD | DIS | M4)) /*GPIO_149*/ \ - MUX_VAL(CP(UART1_CTS), (IDIS | PTD | DIS | M4)) /*GPIO_150*/ \ - MUX_VAL(CP(UART1_RX), (IEN | PTD | DIS | M0)) /*UART1_RX*/\ - MUX_VAL(CP(MCBSP4_CLKX), (IEN | PTD | DIS | M1)) /*SSI1_DAT_RX*/\ - MUX_VAL(CP(MCBSP4_DR), (IEN | PTD | DIS | M1)) /*SSI1_FLAG_RX*/\ - MUX_VAL(CP(MCBSP4_DX), (IEN | PTD | DIS | M1)) /*SSI1_RDY_RX*/\ - MUX_VAL(CP(MCBSP4_FSX), (IEN | PTD | DIS | M1)) /*SSI1_WAKE*/\ - MUX_VAL(CP(MCBSP1_CLKR), (IDIS | PTD | DIS | M4)) /*GPIO_156*/\ - MUX_VAL(CP(MCBSP1_FSR), (IDIS | PTU | EN | M4)) /*GPIO_157*/\ - MUX_VAL(CP(MCBSP1_DX), (IDIS | PTD | DIS | M4)) /*GPIO_158*/\ - MUX_VAL(CP(MCBSP1_DR), (IDIS | PTD | DIS | M4)) /*GPIO_159*/\ - MUX_VAL(CP(MCBSP_CLKS), (IEN | PTU | DIS | M0)) /*McBSP_CLKS*/\ - MUX_VAL(CP(MCBSP1_FSX), (IDIS | PTD | DIS | M4)) /*GPIO_161*/\ - MUX_VAL(CP(MCBSP1_CLKX), (IDIS | PTD | DIS | M4)) /*GPIO_162*/\ - /*Serial Interface*/\ - MUX_VAL(CP(UART3_CTS_RCTX), (IEN | PTD | EN | M0)) /*UART3_CTS_RCTX*/\ - MUX_VAL(CP(UART3_RTS_SD), (IDIS | PTD | DIS | M0)) /*UART3_RTS_SD */\ - MUX_VAL(CP(UART3_RX_IRRX), (IEN | PTD | DIS | M0)) /*UART3_RX_IRRX*/\ - MUX_VAL(CP(UART3_TX_IRTX), (IDIS | PTD | DIS | M0)) /*UART3_TX_IRTX*/\ - MUX_VAL(CP(HSUSB0_CLK), (IEN | PTD | DIS | M0)) /*HSUSB0_CLK*/\ - MUX_VAL(CP(HSUSB0_STP), (IDIS | PTU | EN | M0)) /*HSUSB0_STP*/\ - MUX_VAL(CP(HSUSB0_DIR), (IEN | PTD | DIS | M0)) /*HSUSB0_DIR*/\ - MUX_VAL(CP(HSUSB0_NXT), (IEN | PTD | DIS | M0)) /*HSUSB0_NXT*/\ - MUX_VAL(CP(HSUSB0_DATA0), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA0*/\ - MUX_VAL(CP(HSUSB0_DATA1), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA1*/\ - MUX_VAL(CP(HSUSB0_DATA2), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA2*/\ - MUX_VAL(CP(HSUSB0_DATA3), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA3*/\ - MUX_VAL(CP(HSUSB0_DATA4), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA4*/\ - MUX_VAL(CP(HSUSB0_DATA5), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA5*/\ - MUX_VAL(CP(HSUSB0_DATA6), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA6*/\ - MUX_VAL(CP(HSUSB0_DATA7), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA7*/\ - MUX_VAL(CP(I2C1_SCL), (IEN | PTU | EN | M0)) /*I2C1_SCL*/\ - MUX_VAL(CP(I2C1_SDA), (IEN | PTU | EN | M0)) /*I2C1_SDA*/\ - MUX_VAL(CP(I2C2_SCL), (IEN | PTU | EN | M0)) /*I2C2_SCL*/\ - MUX_VAL(CP(I2C2_SDA), (IEN | PTU | EN | M0)) /*I2C2_SDA*/\ - MUX_VAL(CP(I2C3_SCL), (IEN | PTU | EN | M0)) /*I2C3_SCL*/\ - MUX_VAL(CP(I2C3_SDA), (IEN | PTU | EN | M0)) /*I2C3_SDA*/\ - MUX_VAL(CP(I2C4_SCL), (IEN | PTU | EN | M0)) /*I2C4_SCL*/\ - MUX_VAL(CP(I2C4_SDA), (IEN | PTU | EN | M0)) /*I2C4_SDA*/\ - MUX_VAL(CP(HDQ_SIO), (IDIS | PTU | EN | M4)) /*GPIO_170*/\ - MUX_VAL(CP(MCSPI1_CLK), (IEN | PTU | EN | M4)) /*GPIO_171*/\ - MUX_VAL(CP(MCSPI1_SIMO), (IEN | PTU | EN | M4)) /*GPIO_172*/\ - MUX_VAL(CP(MCSPI1_SOMI), (IEN | PTU | EN | M4)) /*GPIO_173*/\ - MUX_VAL(CP(MCSPI1_CS0), (IEN | PTD | EN | M0)) /*McSPI1_CS0*/\ - MUX_VAL(CP(MCSPI1_CS1), (IDIS | PTD | EN | M0)) /*McSPI1_CS1*/\ - MUX_VAL(CP(MCSPI1_CS2), (IDIS | PTD | DIS | M4)) /*GPIO_176*/\ - /* USB EHCI (port 2) */\ - MUX_VAL(CP(MCSPI1_CS3), (IEN | PTD | EN | M3)) /*HSUSB2_DATA2*/\ - MUX_VAL(CP(MCSPI2_CLK), (IEN | PTD | EN | M3)) /*HSUSB2_DATA7*/\ - MUX_VAL(CP(MCSPI2_SIMO), (IEN | PTD | EN | M3)) /*HSUSB2_DATA4*/\ - MUX_VAL(CP(MCSPI2_SOMI), (IEN | PTD | EN | M3)) /*HSUSB2_DATA5*/\ - MUX_VAL(CP(MCSPI2_CS0), (IEN | PTD | EN | M3)) /*HSUSB2_DATA6*/\ - MUX_VAL(CP(MCSPI2_CS1), (IEN | PTD | EN | M3)) /*HSUSB2_DATA3*/\ - MUX_VAL(CP(ETK_D10_ES2), (IDIS | PTD | DIS | M3)) /*HSUSB2_CLK*/\ - MUX_VAL(CP(ETK_D11_ES2), (IDIS | PTD | DIS | M3)) /*HSUSB2_STP*/\ - MUX_VAL(CP(ETK_D12_ES2), (IEN | PTD | EN | M3)) /*HSUSB2_DIR*/\ - MUX_VAL(CP(ETK_D13_ES2), (IEN | PTD | EN | M3)) /*HSUSB2_NXT*/\ - MUX_VAL(CP(ETK_D14_ES2), (IEN | PTD | EN | M3)) /*HSUSB2_DATA0*/\ - MUX_VAL(CP(ETK_D15_ES2), (IEN | PTD | EN | M3)) /*HSUSB2_DATA1*/\ - /*Control and debug */\ - MUX_VAL(CP(SYS_32K), (IEN | PTD | DIS | M0)) /*SYS_32K*/\ - MUX_VAL(CP(SYS_CLKREQ), (IEN | PTD | DIS | M0)) /*SYS_CLKREQ*/\ - MUX_VAL(CP(SYS_NIRQ), (IEN | PTU | EN | M0)) /*SYS_nIRQ*/\ - MUX_VAL(CP(SYS_BOOT0), (IEN | PTD | DIS | M4)) /*GPIO_2*/\ - MUX_VAL(CP(SYS_BOOT1), (IEN | PTD | DIS | M4)) /*GPIO_3*/\ - MUX_VAL(CP(SYS_BOOT2), (IEN | PTD | DIS | M4)) /*GPIO_4 - MMC1_WP*/\ - MUX_VAL(CP(SYS_BOOT3), (IEN | PTD | DIS | M4)) /*GPIO_5*/\ - MUX_VAL(CP(SYS_BOOT4), (IEN | PTD | DIS | M4)) /*GPIO_6*/\ - MUX_VAL(CP(SYS_BOOT5), (IEN | PTD | DIS | M4)) /*GPIO_7*/\ - MUX_VAL(CP(SYS_BOOT6), (IDIS | PTD | DIS | M4)) /*GPIO_8*/ \ - MUX_VAL(CP(SYS_OFF_MODE), (IEN | PTD | DIS | M0)) /*SYS_OFF_MODE*/\ - MUX_VAL(CP(SYS_CLKOUT1), (IEN | PTD | DIS | M0)) /*SYS_CLKOUT1*/\ - MUX_VAL(CP(SYS_CLKOUT2), (IEN | PTU | EN | M4)) /*GPIO_186*/\ - MUX_VAL(CP(ETK_CLK_ES2), (IDIS | PTU | EN | M3)) /*HSUSB1_STP*/\ - MUX_VAL(CP(ETK_CTL_ES2), (IDIS | PTU | DIS | M3)) /*HSUSB1_CLK*/\ - MUX_VAL(CP(ETK_D0_ES2), (IEN | PTU | DIS | M3)) /*HSUSB1_DATA0*/\ - MUX_VAL(CP(ETK_D1_ES2), (IEN | PTU | DIS | M3)) /*HSUSB1_DATA1*/\ - MUX_VAL(CP(ETK_D2_ES2), (IEN | PTU | DIS | M3)) /*HSUSB1_DATA2*/\ - MUX_VAL(CP(ETK_D3_ES2), (IEN | PTU | DIS | M3)) /*HSUSB1_DATA7*/\ - MUX_VAL(CP(ETK_D4_ES2), (IEN | PTU | DIS | M3)) /*HSUSB1_DATA4*/\ - MUX_VAL(CP(ETK_D5_ES2), (IEN | PTU | DIS | M3)) /*HSUSB1_DATA5*/\ - MUX_VAL(CP(ETK_D6_ES2), (IEN | PTU | DIS | M3)) /*HSUSB1_DATA6*/\ - MUX_VAL(CP(ETK_D7_ES2), (IEN | PTU | DIS | M3)) /*HSUSB1_DATA3*/\ - MUX_VAL(CP(ETK_D8_ES2), (IEN | PTU | DIS | M3)) /*HSUSB1_DIR*/\ - MUX_VAL(CP(ETK_D9_ES2), (IEN | PTU | DIS | M3)) /*HSUSB1_NXT*/\ - MUX_VAL(CP(D2D_MCAD1), (IEN | PTD | EN | M0)) /*d2d_mcad1*/\ - MUX_VAL(CP(D2D_MCAD2), (IEN | PTD | EN | M0)) /*d2d_mcad2*/\ - MUX_VAL(CP(D2D_MCAD3), (IEN | PTD | EN | M0)) /*d2d_mcad3*/\ - MUX_VAL(CP(D2D_MCAD4), (IEN | PTD | EN | M0)) /*d2d_mcad4*/\ - MUX_VAL(CP(D2D_MCAD5), (IEN | PTD | EN | M0)) /*d2d_mcad5*/\ - MUX_VAL(CP(D2D_MCAD6), (IEN | PTD | EN | M0)) /*d2d_mcad6*/\ - MUX_VAL(CP(D2D_MCAD7), (IEN | PTD | EN | M0)) /*d2d_mcad7*/\ - MUX_VAL(CP(D2D_MCAD8), (IEN | PTD | EN | M0)) /*d2d_mcad8*/\ - MUX_VAL(CP(D2D_MCAD9), (IEN | PTD | EN | M0)) /*d2d_mcad9*/\ - MUX_VAL(CP(D2D_MCAD10), (IEN | PTD | EN | M0)) /*d2d_mcad10*/\ - MUX_VAL(CP(D2D_MCAD11), (IEN | PTD | EN | M0)) /*d2d_mcad11*/\ - MUX_VAL(CP(D2D_MCAD12), (IEN | PTD | EN | M0)) /*d2d_mcad12*/\ - MUX_VAL(CP(D2D_MCAD13), (IEN | PTD | EN | M0)) /*d2d_mcad13*/\ - MUX_VAL(CP(D2D_MCAD14), (IEN | PTD | EN | M0)) /*d2d_mcad14*/\ - MUX_VAL(CP(D2D_MCAD15), (IEN | PTD | EN | M0)) /*d2d_mcad15*/\ - MUX_VAL(CP(D2D_MCAD16), (IEN | PTD | EN | M0)) /*d2d_mcad16*/\ - MUX_VAL(CP(D2D_MCAD17), (IEN | PTD | EN | M0)) /*d2d_mcad17*/\ - MUX_VAL(CP(D2D_MCAD18), (IEN | PTD | EN | M0)) /*d2d_mcad18*/\ - MUX_VAL(CP(D2D_MCAD19), (IEN | PTD | EN | M0)) /*d2d_mcad19*/\ - MUX_VAL(CP(D2D_MCAD20), (IEN | PTD | EN | M0)) /*d2d_mcad20*/\ - MUX_VAL(CP(D2D_MCAD21), (IEN | PTD | EN | M0)) /*d2d_mcad21*/\ - MUX_VAL(CP(D2D_MCAD22), (IEN | PTD | EN | M0)) /*d2d_mcad22*/\ - MUX_VAL(CP(D2D_MCAD23), (IEN | PTD | EN | M0)) /*d2d_mcad23*/\ - MUX_VAL(CP(D2D_MCAD24), (IEN | PTD | EN | M0)) /*d2d_mcad24*/\ - MUX_VAL(CP(D2D_MCAD25), (IEN | PTD | EN | M0)) /*d2d_mcad25*/\ - MUX_VAL(CP(D2D_MCAD26), (IEN | PTD | EN | M0)) /*d2d_mcad26*/\ - MUX_VAL(CP(D2D_MCAD27), (IEN | PTD | EN | M0)) /*d2d_mcad27*/\ - MUX_VAL(CP(D2D_MCAD28), (IEN | PTD | EN | M0)) /*d2d_mcad28*/\ - MUX_VAL(CP(D2D_MCAD29), (IEN | PTD | EN | M0)) /*d2d_mcad29*/\ - MUX_VAL(CP(D2D_MCAD30), (IEN | PTD | EN | M0)) /*d2d_mcad30*/\ - MUX_VAL(CP(D2D_MCAD31), (IEN | PTD | EN | M0)) /*d2d_mcad31*/\ - MUX_VAL(CP(D2D_MCAD32), (IEN | PTD | EN | M0)) /*d2d_mcad32*/\ - MUX_VAL(CP(D2D_MCAD33), (IEN | PTD | EN | M0)) /*d2d_mcad33*/\ - MUX_VAL(CP(D2D_MCAD34), (IEN | PTD | EN | M0)) /*d2d_mcad34*/\ - MUX_VAL(CP(D2D_MCAD35), (IEN | PTD | EN | M0)) /*d2d_mcad35*/\ - MUX_VAL(CP(D2D_MCAD36), (IEN | PTD | EN | M0)) /*d2d_mcad36*/\ - MUX_VAL(CP(D2D_CLK26MI), (IEN | PTD | DIS | M0)) /*d2d_clk26mi*/\ - MUX_VAL(CP(D2D_NRESPWRON), (IEN | PTD | EN | M0)) /*d2d_nrespwron*/\ - MUX_VAL(CP(D2D_NRESWARM), (IEN | PTU | EN | M0)) /*d2d_nreswarm */\ - MUX_VAL(CP(D2D_ARM9NIRQ), (IEN | PTD | DIS | M0)) /*d2d_arm9nirq */\ - MUX_VAL(CP(D2D_UMA2P6FIQ), (IEN | PTD | DIS | M0)) /*d2d_uma2p6fiq*/\ - MUX_VAL(CP(D2D_SPINT), (IEN | PTD | EN | M0)) /*d2d_spint*/\ - MUX_VAL(CP(D2D_FRINT), (IEN | PTD | EN | M0)) /*d2d_frint*/\ - MUX_VAL(CP(D2D_DMAREQ0), (IEN | PTD | DIS | M0)) /*d2d_dmareq0*/\ - MUX_VAL(CP(D2D_DMAREQ1), (IEN | PTD | DIS | M0)) /*d2d_dmareq1*/\ - MUX_VAL(CP(D2D_DMAREQ2), (IEN | PTD | DIS | M0)) /*d2d_dmareq2*/\ - MUX_VAL(CP(D2D_DMAREQ3), (IEN | PTD | DIS | M0)) /*d2d_dmareq3*/\ - MUX_VAL(CP(D2D_N3GTRST), (IEN | PTD | DIS | M0)) /*d2d_n3gtrst*/\ - MUX_VAL(CP(D2D_N3GTDI), (IEN | PTD | DIS | M0)) /*d2d_n3gtdi*/\ - MUX_VAL(CP(D2D_N3GTDO), (IEN | PTD | DIS | M0)) /*d2d_n3gtdo*/\ - MUX_VAL(CP(D2D_N3GTMS), (IEN | PTD | DIS | M0)) /*d2d_n3gtms*/\ - MUX_VAL(CP(D2D_N3GTCK), (IEN | PTD | DIS | M0)) /*d2d_n3gtck*/\ - MUX_VAL(CP(D2D_N3GRTCK), (IEN | PTD | DIS | M0)) /*d2d_n3grtck*/\ - MUX_VAL(CP(D2D_MSTDBY), (IEN | PTU | EN | M0)) /*d2d_mstdby*/\ - MUX_VAL(CP(D2D_SWAKEUP), (IEN | PTD | EN | M0)) /*d2d_swakeup*/\ - MUX_VAL(CP(D2D_IDLEREQ), (IEN | PTD | DIS | M0)) /*d2d_idlereq*/\ - MUX_VAL(CP(D2D_IDLEACK), (IEN | PTU | EN | M0)) /*d2d_idleack*/\ - MUX_VAL(CP(D2D_MWRITE), (IEN | PTD | DIS | M0)) /*d2d_mwrite*/\ - MUX_VAL(CP(D2D_SWRITE), (IEN | PTD | DIS | M0)) /*d2d_swrite*/\ - MUX_VAL(CP(D2D_MREAD), (IEN | PTD | DIS | M0)) /*d2d_mread*/\ - MUX_VAL(CP(D2D_SREAD), (IEN | PTD | DIS | M0)) /*d2d_sread*/\ - MUX_VAL(CP(D2D_MBUSFLAG), (IEN | PTD | DIS | M0)) /*d2d_mbusflag*/\ - MUX_VAL(CP(D2D_SBUSFLAG), (IEN | PTD | DIS | M0)) /*d2d_sbusflag*/\ - MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | EN | M0)) /*sdrc_cke0*/\ - MUX_VAL(CP(SDRC_CKE1), (IDIS | PTU | EN | M0)) /*sdrc_cke1*/ - -#define MUX_BEAGLE_C() \ - MUX_VAL(CP(MCBSP3_DX), (IEN | PTD | DIS | M4)) /*GPIO_140*/\ - MUX_VAL(CP(MCBSP3_DR), (IEN | PTD | DIS | M4)) /*GPIO_142*/\ - MUX_VAL(CP(MCBSP3_CLKX), (IEN | PTD | DIS | M4)) /*GPIO_141*/\ - MUX_VAL(CP(UART2_CTS), (IEN | PTU | EN | M0)) /*UART2_CTS*/\ - MUX_VAL(CP(UART2_RTS), (IDIS | PTD | DIS | M0)) /*UART2_RTS*/\ - MUX_VAL(CP(UART2_TX), (IDIS | PTD | DIS | M0)) /*UART2_TX*/\ - MUX_VAL(CP(UART2_RX), (IDIS | PTU | EN | M4)) /*GPIO_147*/ - -#define MUX_BEAGLE_XM() \ - MUX_VAL(CP(GPMC_NCS5), (IDIS | PTD | EN | M4)) /*GPIO_56*/\ - MUX_VAL(CP(GPMC_WAIT1), (IDIS | PTU | EN | M4)) /*GPIO_63*/\ - MUX_VAL(CP(MMC1_DAT7), (IDIS | PTU | EN | M4)) /*GPIO_129*/\ - MUX_VAL(CP(HDQ_SIO), (IDIS | PTU | EN | M4)) /*GPIO_170*/\ - MUX_VAL(CP(MCBSP3_DX), (IEN | PTD | DIS | M4)) /*GPIO_140*/\ - MUX_VAL(CP(MCBSP3_DR), (IEN | PTD | DIS | M4)) /*GPIO_142*/\ - MUX_VAL(CP(MCBSP3_CLKX), (IEN | PTD | DIS | M4)) /*GPIO_141*/\ - MUX_VAL(CP(UART2_CTS), (IEN | PTU | EN | M0)) /*UART2_CTS*/\ - MUX_VAL(CP(UART2_RTS), (IDIS | PTD | DIS | M0)) /*UART2_RTS*/\ - MUX_VAL(CP(UART2_TX), (IDIS | PTD | DIS | M0)) /*UART2_TX*/\ - MUX_VAL(CP(DSS_DATA0), (IDIS | PTD | DIS | M7)) /*safe_mode*/\ - MUX_VAL(CP(DSS_DATA1), (IDIS | PTD | DIS | M7)) /*safe_mode*/\ - MUX_VAL(CP(DSS_DATA2), (IDIS | PTD | DIS | M7)) /*safe_mode*/\ - MUX_VAL(CP(DSS_DATA3), (IDIS | PTD | DIS | M7)) /*safe_mode*/\ - MUX_VAL(CP(DSS_DATA4), (IDIS | PTD | DIS | M7)) /*safe_mode*/\ - MUX_VAL(CP(DSS_DATA5), (IDIS | PTD | DIS | M7)) /*safe_mode*/\ - MUX_VAL(CP(DSS_DATA18), (IDIS | PTD | DIS | M3)) /*DSS_DATA0*/\ - MUX_VAL(CP(DSS_DATA19), (IDIS | PTD | DIS | M3)) /*DSS_DATA1*/\ - MUX_VAL(CP(DSS_DATA20), (IDIS | PTD | DIS | M3)) /*DSS_DATA2*/\ - MUX_VAL(CP(DSS_DATA21), (IDIS | PTD | DIS | M3)) /*DSS_DATA3*/\ - MUX_VAL(CP(DSS_DATA22), (IDIS | PTD | DIS | M3)) /*DSS_DATA4*/\ - MUX_VAL(CP(DSS_DATA23), (IDIS | PTD | DIS | M3)) /*DSS_DATA5*/\ - MUX_VAL(CP(SYS_BOOT0), (IDIS | PTD | DIS | M3)) /*DSS_DATA18*/\ - MUX_VAL(CP(SYS_BOOT1), (IDIS | PTD | DIS | M3)) /*DSS_DATA19*/\ - MUX_VAL(CP(SYS_BOOT3), (IDIS | PTD | DIS | M3)) /*DSS_DATA20*/\ - MUX_VAL(CP(SYS_BOOT4), (IDIS | PTD | DIS | M3)) /*DSS_DATA21*/\ - MUX_VAL(CP(SYS_BOOT5), (IDIS | PTD | DIS | M3)) /*DSS_DATA22*/\ - MUX_VAL(CP(SYS_BOOT6), (IDIS | PTD | DIS | M3)) /*DSS_DATA23*/ - -#define MUX_TINCANTOOLS_ZIPPY() \ - MUX_VAL(CP(MMC2_CLK), (IEN | PTU | EN | M0)) /*MMC2_CLK*/\ - MUX_VAL(CP(MMC2_CMD), (IEN | PTU | EN | M0)) /*MMC2_CMD*/\ - MUX_VAL(CP(MMC2_DAT0), (IEN | PTU | EN | M0)) /*MMC2_DAT0*/\ - MUX_VAL(CP(MMC2_DAT1), (IEN | PTU | EN | M0)) /*MMC2_DAT1*/\ - MUX_VAL(CP(MMC2_DAT2), (IEN | PTU | EN | M0)) /*MMC2_DAT2*/\ - MUX_VAL(CP(MMC2_DAT3), (IEN | PTU | EN | M0)) /*MMC2_DAT3*/\ - MUX_VAL(CP(MMC2_DAT4), (IEN | PTU | EN | M1)) /*MMC2_DIR_DAT0*/\ - MUX_VAL(CP(MMC2_DAT5), (IEN | PTU | EN | M1)) /*MMC2_DIR_DAT1*/\ - MUX_VAL(CP(MMC2_DAT6), (IEN | PTU | EN | M1)) /*MMC2_DIR_CMD*/\ - MUX_VAL(CP(MMC2_DAT7), (IEN | PTU | EN | M1)) /*MMC2_CLKIN*/\ - MUX_VAL(CP(MCBSP1_CLKR), (IEN | PTU | EN | M1)) /*MCSPI4_CLK*/\ - MUX_VAL(CP(MCBSP1_FSR), (IEN | PTU | EN | M4)) /*GPIO_157*/\ - MUX_VAL(CP(MCBSP1_DX), (IEN | PTD | EN | M1)) /*MCSPI4_SIMO*/\ - MUX_VAL(CP(MCBSP1_DR), (IEN | PTD | DIS | M1)) /*MCSPI4_SOMI*/\ - MUX_VAL(CP(MCBSP1_FSX), (IEN | PTD | EN | M1)) /*MCSPI4_CS0*/\ - MUX_VAL(CP(MCBSP1_CLKX), (IEN | PTD | DIS | M4)) /*GPIO_162*/\ - MUX_VAL(CP(MCBSP3_DX), (IEN | PTD | DIS | M4)) /*GPIO_140*/\ - MUX_VAL(CP(MCBSP3_DR), (IEN | PTD | DIS | M4)) /*GPIO_142*/\ - MUX_VAL(CP(MCBSP3_CLKX), (IEN | PTD | DIS | M4)) /*GPIO_141*/ - -#define MUX_TINCANTOOLS_TRAINER() \ - MUX_VAL(CP(MMC2_CLK), (IEN | PTU | EN | M4)) /*GPIO_130*/\ - MUX_VAL(CP(MMC2_CMD), (IEN | PTU | EN | M4)) /*GPIO_131*/\ - MUX_VAL(CP(MMC2_DAT0), (IEN | PTU | EN | M4)) /*GPIO_132*/\ - MUX_VAL(CP(MMC2_DAT1), (IEN | PTU | EN | M4)) /*GPIO_133*/\ - MUX_VAL(CP(MMC2_DAT2), (IEN | PTU | EN | M4)) /*GPIO_134*/\ - MUX_VAL(CP(MMC2_DAT3), (IEN | PTU | EN | M4)) /*GPIO_135*/\ - MUX_VAL(CP(MMC2_DAT4), (IEN | PTU | EN | M4)) /*GPIO_136*/\ - MUX_VAL(CP(MMC2_DAT5), (IEN | PTU | EN | M4)) /*GPIO_137*/\ - MUX_VAL(CP(MMC2_DAT6), (IEN | PTU | EN | M4)) /*GPIO_138*/\ - MUX_VAL(CP(MMC2_DAT7), (IEN | PTU | EN | M4)) /*GPIO_139*/\ - MUX_VAL(CP(MCBSP3_DX), (IEN | PTU | EN | M4)) /*GPIO_140*/\ - MUX_VAL(CP(MCBSP3_CLKX), (IEN | PTU | EN | M4)) /*GPIO_141*/\ - MUX_VAL(CP(MCBSP1_CLKX), (IEN | PTU | EN | M4)) /*GPIO_162*/ - -#define MUX_KBADC_BEAGLEFPGA() \ - MUX_VAL(CP(MCBSP1_CLKR), (IEN | PTU | DIS | M1)) /*MCSPI4_CLK*/\ - MUX_VAL(CP(MCBSP1_DX), (IDIS | PTU | DIS | M1)) /*MCSPI4_SIMO*/\ - MUX_VAL(CP(MCBSP1_DR), (IEN | PTU | EN | M1)) /*MCSPI4_SOMI*/\ - MUX_VAL(CP(MCBSP1_FSX), (IDIS | PTU | DIS | M1)) /*MCSPI4_CS0*/ - -#define MUX_BBTOYS_WIFI() \ - MUX_VAL(CP(MMC2_CLK), (IEN | PTU | EN | M0)) /*MMC2_CLK*/\ - MUX_VAL(CP(MMC2_CMD), (IEN | PTU | EN | M0)) /*MMC2_CMD*/\ - MUX_VAL(CP(MMC2_DAT0), (IEN | PTU | EN | M0)) /*MMC2_DAT0*/\ - MUX_VAL(CP(MMC2_DAT1), (IEN | PTU | EN | M0)) /*MMC2_DAT1*/\ - MUX_VAL(CP(MMC2_DAT2), (IEN | PTU | EN | M0)) /*MMC2_DAT2*/\ - MUX_VAL(CP(MMC2_DAT3), (IEN | PTU | EN | M0)) /*MMC2_DAT3*/\ - MUX_VAL(CP(MMC2_DAT4), (IDIS | PTU | EN | M4)) /*GPIO_136 FM_EN/BT_WU*/\ - MUX_VAL(CP(MMC2_DAT5), (IEN | PTU | EN | M4)) /*GPIO_137 WLAN_IRQ*/\ - MUX_VAL(CP(MMC2_DAT6), (IDIS | PTU | EN | M4)) /*GPIO_138 BT_EN*/\ - MUX_VAL(CP(MMC2_DAT7), (IDIS | PTU | EN | M4)) /*GPIO_139 WLAN_EN*/ - -/* - * Display Configuration - */ - -#define DVI_BEAGLE_ORANGE_COL 0x00FF8000 -#define VENC_HEIGHT 0x00ef -#define VENC_WIDTH 0x027f - -/* - * Configure VENC in DSS for Beagle to generate Color Bar - * - * Kindly refer to OMAP TRM for definition of these values. - */ -static const struct venc_regs venc_config_std_tv = { - .status = 0x0000001B, - .f_control = 0x00000040, - .vidout_ctrl = 0x00000000, - .sync_ctrl = 0x00008000, - .llen = 0x00008359, - .flens = 0x0000020C, - .hfltr_ctrl = 0x00000000, - .cc_carr_wss_carr = 0x043F2631, - .c_phase = 0x00000024, - .gain_u = 0x00000130, - .gain_v = 0x00000198, - .gain_y = 0x000001C0, - .black_level = 0x0000006A, - .blank_level = 0x0000005C, - .x_color = 0x00000000, - .m_control = 0x00000001, - .bstamp_wss_data = 0x0000003F, - .s_carr = 0x21F07C1F, - .line21 = 0x00000000, - .ln_sel = 0x00000015, - .l21__wc_ctl = 0x00001400, - .htrigger_vtrigger = 0x00000000, - .savid__eavid = 0x069300F4, - .flen__fal = 0x0016020C, - .lal__phase_reset = 0x00060107, - .hs_int_start_stop_x = 0x008D034E, - .hs_ext_start_stop_x = 0x000F0359, - .vs_int_start_x = 0x01A00000, - .vs_int_stop_x__vs_int_start_y = 0x020501A0, - .vs_int_stop_y__vs_ext_start_x = 0x01AC0024, - .vs_ext_stop_x__vs_ext_start_y = 0x020D01AC, - .vs_ext_stop_y = 0x00000006, - .avid_start_stop_x = 0x03480079, - .avid_start_stop_y = 0x02040024, - .fid_int_start_x__fid_int_start_y = 0x0001008A, - .fid_int_offset_y__fid_ext_start_x = 0x01AC0106, - .fid_ext_start_y__fid_ext_offset_y = 0x01060006, - .tvdetgp_int_start_stop_x = 0x00140001, - .tvdetgp_int_start_stop_y = 0x00010001, - .gen_ctrl = 0x00FF0000, - .output_control = 0x0000000D, - .dac_b__dac_c = 0x00000000 -}; - -/* - * Configure Timings for DVI D - */ -static const struct panel_config dvid_cfg = { - .timing_h = 0x0ff03f31, /* Horizontal timing */ - .timing_v = 0x01400504, /* Vertical timing */ - .pol_freq = 0x00007028, /* Pol Freq */ - .divisor = 0x00010006, /* 72Mhz Pixel Clock */ - .lcd_size = 0x02ff03ff, /* 1024x768 */ - .panel_type = 0x01, /* TFT */ - .data_lines = 0x03, /* 24 Bit RGB */ - .load_mode = 0x02, /* Frame Mode */ - .panel_color = DVI_BEAGLE_ORANGE_COL, /* ORANGE */ - .gfx_format = GFXFORMAT_RGB24_UNPACKED, -}; - -static const struct panel_config dvid_cfg_xm = { - .timing_h = 0x1a4024c9, /* Horizontal timing */ - .timing_v = 0x02c00509, /* Vertical timing */ - .pol_freq = 0x00007028, /* Pol Freq */ - .divisor = 0x00010001, /* 96MHz Pixel Clock */ - .lcd_size = 0x02ff03ff, /* 1024x768 */ - .panel_type = 0x01, /* TFT */ - .data_lines = 0x03, /* 24 Bit RGB */ - .load_mode = 0x02, /* Frame Mode */ - .panel_color = DVI_BEAGLE_ORANGE_COL, /* ORANGE */ - .gfx_format = GFXFORMAT_RGB24_UNPACKED, -}; -#endif diff --git a/board/beagle/beagle/led.c b/board/beagle/beagle/led.c deleted file mode 100644 index efbd7c1e0e..0000000000 --- a/board/beagle/beagle/led.c +++ /dev/null @@ -1,70 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (c) 2010 Texas Instruments, Inc. - * Jason Kridner <jkridner@beagleboard.org> - */ -#include <status_led.h> -#include <asm/arch/cpu.h> -#include <asm/io.h> -#include <asm/arch/sys_proto.h> -#include <asm/gpio.h> - -/* GPIO pins for the LEDs */ -#define BEAGLE_LED_USR0 150 -#define BEAGLE_LED_USR1 149 - -#ifdef CONFIG_LED_STATUS_GREEN -void green_led_off(void) -{ - __led_set(CONFIG_LED_STATUS_GREEN, 0); -} - -void green_led_on(void) -{ - __led_set(CONFIG_LED_STATUS_GREEN, 1); -} -#endif - -static int get_led_gpio(led_id_t mask) -{ -#ifdef CONFIG_LED_STATUS0 - if (CONFIG_LED_STATUS_BIT & mask) - return BEAGLE_LED_USR0; -#endif -#ifdef CONFIG_LED_STATUS1 - if (CONFIG_LED_STATUS_BIT1 & mask) - return BEAGLE_LED_USR1; -#endif - - return 0; -} - -void __led_init (led_id_t mask, int state) -{ - int toggle_gpio; - - toggle_gpio = get_led_gpio(mask); - - if (toggle_gpio && !gpio_request(toggle_gpio, "led")) - __led_set(mask, state); -} - -void __led_toggle (led_id_t mask) -{ - int state, toggle_gpio; - - toggle_gpio = get_led_gpio(mask); - if (toggle_gpio) { - state = gpio_get_value(toggle_gpio); - gpio_direction_output(toggle_gpio, !state); - } -} - -void __led_set (led_id_t mask, int state) -{ - int toggle_gpio; - - toggle_gpio = get_led_gpio(mask); - if (toggle_gpio) - gpio_direction_output(toggle_gpio, state); -} diff --git a/board/keymile/Kconfig b/board/keymile/Kconfig index f7e9b74f57..4145881385 100644 --- a/board/keymile/Kconfig +++ b/board/keymile/Kconfig @@ -11,9 +11,6 @@ if VENDOR_KM menu "KM Board Setup" -config SYS_I2C_INIT_BOARD - def_bool y if ARM - config HUSH_INIT_VAR def_bool y diff --git a/board/keymile/common/common.c b/board/keymile/common/common.c index 9358c25dcb..25897af2d8 100644 --- a/board/keymile/common/common.c +++ b/board/keymile/common/common.c @@ -129,7 +129,6 @@ void check_for_uboot_update(void) } #endif -#if defined(CONFIG_SYS_I2C_INIT_BOARD) static void i2c_write_start_seq(void) { set_sda(1); @@ -187,17 +186,6 @@ int i2c_make_abort(void) return ret; } -/** - * i2c_init_board - reset i2c bus. When the board is powercycled during a - * bus transfer it might hang; for details see doc/I2C_Edge_Conditions. - */ -void i2c_init_board(void) -{ - /* Now run the AbortSequence() */ - i2c_make_abort(); -} -#endif - #if defined(CONFIG_KM_COMMON_ETH_INIT) int board_eth_init(struct bd_info *bis) { diff --git a/board/keymile/common/common.h b/board/keymile/common/common.h index d16c82487b..7d2fdffe98 100644 --- a/board/keymile/common/common.h +++ b/board/keymile/common/common.h @@ -138,13 +138,12 @@ void early_bootcount_store(ulong ebootcount); void check_for_uboot_update(void); #define DELAY_ABORT_SEQ 62 /* @200kHz 9 clocks = 44us, 62us is ok */ -#define DELAY_HALF_PERIOD (500 / (CONFIG_SYS_I2C_SPEED / 1000)) +#define DELAY_HALF_PERIOD (500 / (I2C_SPEED_STANDARD_RATE / 1000)) void set_sda(int state); void set_scl(int state); int get_sda(void); int get_scl(void); -int i2c_soft_read_pin(void); int i2c_make_abort(void); #endif /* __KEYMILE_COMMON_H */ diff --git a/board/keymile/common/ivm.c b/board/keymile/common/ivm.c index f01fe44303..9360c86566 100644 --- a/board/keymile/common/ivm.c +++ b/board/keymile/common/ivm.c @@ -342,9 +342,8 @@ static int ivm_populate_env(unsigned char *buf, int len, int mac_address_offset) int ivm_read_eeprom(unsigned char *buf, int len, int mac_address_offset) { - int ret; -#if CONFIG_IS_ENABLED(DM_I2C) struct udevice *eedev = NULL; + int ret; ret = i2c_get_chip_for_busnum(CONFIG_KM_IVM_BUS, CONFIG_SYS_IVM_EEPROM_ADR, 1, &eedev); @@ -354,22 +353,17 @@ int ivm_read_eeprom(unsigned char *buf, int len, int mac_address_offset) return 1; } +#if CONFIG_IS_ENABLED(ARCH_LS1021A) + /* add deblocking here */ + i2c_make_abort(); +#endif + ret = dm_i2c_read(eedev, 0, buf, len); if (ret != 0) { printf("Error: Unable to read from I2C EEPROM at address %02X:%02X\n", CONFIG_SYS_IVM_EEPROM_ADR, 0); return 1; } -#else - i2c_set_bus_num(CONFIG_KM_IVM_BUS); - /* add deblocking here */ - i2c_make_abort(); - ret = i2c_read(CONFIG_SYS_IVM_EEPROM_ADR, 0, 1, buf, len); - if (ret != 0) { - printf("Error reading EEprom\n"); - return -2; - } -#endif return ivm_populate_env(buf, len, mac_address_offset); } diff --git a/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c b/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c index cc3611e2de..409a55ebda 100644 --- a/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c +++ b/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c @@ -5,7 +5,6 @@ #include <config.h> #include <event.h> -#include <i2c.h> #include <asm/io.h> #include <asm/arch/immap_ls102xa.h> #include <asm/arch/clock.h> @@ -107,6 +106,13 @@ int board_early_init_f(void) arch_soc_init(); + /* + * Reset I2C bus. When the board is powercycled during a bus + * transfer it might hang; for details see doc/I2C_Edge_Conditions. + * Now run the AbortSequence() + */ + i2c_make_abort(); + return 0; } diff --git a/board/ti/panda/Kconfig b/board/ti/panda/Kconfig deleted file mode 100644 index 5912f69bab..0000000000 --- a/board/ti/panda/Kconfig +++ /dev/null @@ -1,14 +0,0 @@ -if TARGET_OMAP4_PANDA - -config SYS_BOARD - default "panda" - -config SYS_VENDOR - default "ti" - -config SYS_CONFIG_NAME - default "omap4_panda" - -source "board/ti/common/Kconfig" - -endif diff --git a/board/ti/panda/MAINTAINERS b/board/ti/panda/MAINTAINERS deleted file mode 100644 index 8b8cf7daf6..0000000000 --- a/board/ti/panda/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -PANDA BOARD -M: Tom Rini <trini@konsulko.com> -S: Maintained -F: board/ti/panda/ -F: include/configs/omap4_panda.h -F: configs/omap4_panda_defconfig diff --git a/board/ti/panda/Makefile b/board/ti/panda/Makefile deleted file mode 100644 index dd2ff33afa..0000000000 --- a/board/ti/panda/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# (C) Copyright 2000, 2001, 2002 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. - -obj-y := panda.o diff --git a/board/ti/panda/panda.c b/board/ti/panda/panda.c deleted file mode 100644 index e47d3a952d..0000000000 --- a/board/ti/panda/panda.c +++ /dev/null @@ -1,322 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2010 - * Texas Instruments Incorporated, <www.ti.com> - * Steve Sakoman <steve@sakoman.com> - */ -#include <init.h> -#include <log.h> -#include <net.h> -#include <serial.h> -#include <asm/global_data.h> -#include <asm/mach-types.h> -#include <asm/arch/sys_proto.h> -#include <asm/arch/mmc_host_def.h> -#include <asm/arch/clock.h> -#include <asm/arch/gpio.h> -#include <asm/gpio.h> -#include <env.h> -#include <twl6030.h> - -#include "panda_mux_data.h" - -#define PANDA_ULPI_PHY_TYPE_GPIO 182 -#define PANDA_BOARD_ID_1_GPIO 101 -#define PANDA_ES_BOARD_ID_1_GPIO 48 -#define PANDA_BOARD_ID_2_GPIO 171 -#define PANDA_ES_BOARD_ID_3_GPIO 3 -#define PANDA_ES_BOARD_ID_4_GPIO 2 - -DECLARE_GLOBAL_DATA_PTR; - -const struct omap_sysinfo sysinfo = { - "Board: OMAP4 Panda\n" -}; - -struct omap4_scrm_regs *const scrm = (struct omap4_scrm_regs *)0x4a30a000; - -/** - * @brief board_init - * - * Return: 0 - */ -int board_init(void) -{ - gpmc_init(); - - gd->bd->bi_arch_number = MACH_TYPE_OMAP4_PANDA; - gd->bd->bi_boot_params = (0x80000000 + 0x100); /* boot param addr */ - - return 0; -} - -#if defined(CONFIG_SPL_OS_BOOT) -int spl_start_uboot(void) -{ - /* break into full u-boot on 'c' */ - if (serial_tstc() && serial_getc() == 'c') - return 1; - - return 0; -} -#endif /* CONFIG_SPL_OS_BOOT */ - -int board_eth_init(struct bd_info *bis) -{ - return 0; -} - -/* -* Routine: get_board_revision -* Description: Detect if we are running on a panda revision A1-A6, -* or an ES panda board. This can be done by reading -* the level of GPIOs and checking the processor revisions. -* This should result in: -* Panda 4430: -* GPIO171, GPIO101, GPIO182: 0 1 1 => A1-A5 -* GPIO171, GPIO101, GPIO182: 1 0 1 => A6 -* Panda ES: -* GPIO2, GPIO3, GPIO171, GPIO48, GPIO182: 0 0 0 1 1 => B1/B2 -* GPIO2, GPIO3, GPIO171, GPIO48, GPIO182: 0 0 1 1 1 => B3 -*/ -int get_board_revision(void) -{ - int board_id0, board_id1, board_id2; - int board_id3, board_id4; - int board_id; - - int processor_rev = omap_revision(); - - /* Setup the mux for the common board ID pins (gpio 171 and 182) */ - writew((IEN | M3), (*ctrl)->control_padconf_core_base + UNIPRO_TX0); - writew((IEN | M3), (*ctrl)->control_padconf_core_base + FREF_CLK2_OUT); - - board_id0 = gpio_get_value(PANDA_ULPI_PHY_TYPE_GPIO); - board_id2 = gpio_get_value(PANDA_BOARD_ID_2_GPIO); - - if ((processor_rev >= OMAP4460_ES1_0 && - processor_rev <= OMAP4460_ES1_1)) { - /* - * Setup the mux for the ES specific board ID pins (gpio 101, - * 2 and 3. - */ - writew((IEN | M3), (*ctrl)->control_padconf_core_base + - GPMC_A24); - writew((IEN | M3), (*ctrl)->control_padconf_core_base + - UNIPRO_RY0); - writew((IEN | M3), (*ctrl)->control_padconf_core_base + - UNIPRO_RX1); - - board_id1 = gpio_get_value(PANDA_ES_BOARD_ID_1_GPIO); - board_id3 = gpio_get_value(PANDA_ES_BOARD_ID_3_GPIO); - board_id4 = gpio_get_value(PANDA_ES_BOARD_ID_4_GPIO); - -#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG - env_set("board_name", "panda-es"); -#endif - board_id = ((board_id4 << 4) | (board_id3 << 3) | - (board_id2 << 2) | (board_id1 << 1) | (board_id0)); - } else { - /* Setup the mux for the Ax specific board ID pins (gpio 101) */ - writew((IEN | M3), (*ctrl)->control_padconf_core_base + - FREF_CLK2_OUT); - - board_id1 = gpio_get_value(PANDA_BOARD_ID_1_GPIO); - board_id = ((board_id2 << 2) | (board_id1 << 1) | (board_id0)); - -#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG - if ((board_id >= 0x3) && (processor_rev == OMAP4430_ES2_3)) - env_set("board_name", "panda-a4"); -#endif - } - - return board_id; -} - -/** - * is_panda_es_rev_b3() - Detect if we are running on rev B3 of panda board ES - * - * - * Detect if we are running on B3 version of ES panda board, - * This can be done by reading the level of GPIO 171 and checking the - * processor revisions. - * GPIO171: 1 => Panda ES Rev B3 - * - * Return : return 1 if Panda ES Rev B3 , else return 0 - */ -u8 is_panda_es_rev_b3(void) -{ - int processor_rev = omap_revision(); - int ret = 0; - - if ((processor_rev >= OMAP4460_ES1_0 && - processor_rev <= OMAP4460_ES1_1)) { - - /* Setup the mux for the common board ID pins (gpio 171) */ - writew((IEN | M3), - (*ctrl)->control_padconf_core_base + UNIPRO_TX0); - - /* if processor_rev is panda ES and GPIO171 is 1,it is rev b3 */ - ret = gpio_get_value(PANDA_BOARD_ID_2_GPIO); - } - return ret; -} - -#ifdef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS -/* - * emif_get_reg_dump() - emif_get_reg_dump strong function - * - * @emif_nr - emif base - * @regs - reg dump of timing values - * - * Strong function to override emif_get_reg_dump weak function in sdram_elpida.c - */ -void emif_get_reg_dump(u32 emif_nr, const struct emif_regs **regs) -{ - u32 omap4_rev = omap_revision(); - - /* Same devices and geometry on both EMIFs */ - if (omap4_rev == OMAP4430_ES1_0) - *regs = &emif_regs_elpida_380_mhz_1cs; - else if (omap4_rev == OMAP4430_ES2_0) - *regs = &emif_regs_elpida_200_mhz_2cs; - else if (omap4_rev == OMAP4430_ES2_3) - *regs = &emif_regs_elpida_400_mhz_1cs; - else if (omap4_rev < OMAP4470_ES1_0) { - if(is_panda_es_rev_b3()) - *regs = &emif_regs_elpida_400_mhz_1cs; - else - *regs = &emif_regs_elpida_400_mhz_2cs; - } - else - *regs = &emif_regs_elpida_400_mhz_1cs; -} - -void emif_get_dmm_regs(const struct dmm_lisa_map_regs - **dmm_lisa_regs) -{ - u32 omap_rev = omap_revision(); - - if (omap_rev == OMAP4430_ES1_0) - *dmm_lisa_regs = &lisa_map_2G_x_1_x_2; - else if (omap_rev == OMAP4430_ES2_3) - *dmm_lisa_regs = &lisa_map_2G_x_2_x_2; - else if (omap_rev < OMAP4460_ES1_0) - *dmm_lisa_regs = &lisa_map_2G_x_2_x_2; - else - *dmm_lisa_regs = &ma_lisa_map_2G_x_2_x_2; -} - -#endif - -/** - * @brief misc_init_r - Configure Panda board specific configurations - * such as power configurations, ethernet initialization as phase2 of - * boot sequence - * - * Return: 0 - */ -int misc_init_r(void) -{ - int phy_type; - u32 auxclk, altclksrc; - - /* EHCI is not supported on ES1.0 */ - if (omap_revision() == OMAP4430_ES1_0) - return 0; - - get_board_revision(); - - gpio_direction_input(PANDA_ULPI_PHY_TYPE_GPIO); - phy_type = gpio_get_value(PANDA_ULPI_PHY_TYPE_GPIO); - - if (phy_type == 1) { - /* ULPI PHY supplied by auxclk3 derived from sys_clk */ - debug("ULPI PHY supplied by auxclk3\n"); - - auxclk = readl(&scrm->auxclk3); - /* Select sys_clk */ - auxclk &= ~AUXCLK_SRCSELECT_MASK; - auxclk |= AUXCLK_SRCSELECT_SYS_CLK << AUXCLK_SRCSELECT_SHIFT; - /* Set the divisor to 2 */ - auxclk &= ~AUXCLK_CLKDIV_MASK; - auxclk |= AUXCLK_CLKDIV_2 << AUXCLK_CLKDIV_SHIFT; - /* Request auxilary clock #3 */ - auxclk |= AUXCLK_ENABLE_MASK; - - writel(auxclk, &scrm->auxclk3); - } else { - /* ULPI PHY supplied by auxclk1 derived from PER dpll */ - debug("ULPI PHY supplied by auxclk1\n"); - - auxclk = readl(&scrm->auxclk1); - /* Select per DPLL */ - auxclk &= ~AUXCLK_SRCSELECT_MASK; - auxclk |= AUXCLK_SRCSELECT_PER_DPLL << AUXCLK_SRCSELECT_SHIFT; - /* Set the divisor to 16 */ - auxclk &= ~AUXCLK_CLKDIV_MASK; - auxclk |= AUXCLK_CLKDIV_16 << AUXCLK_CLKDIV_SHIFT; - /* Request auxilary clock #3 */ - auxclk |= AUXCLK_ENABLE_MASK; - - writel(auxclk, &scrm->auxclk1); - } - - altclksrc = readl(&scrm->altclksrc); - - /* Activate alternate system clock supplier */ - altclksrc &= ~ALTCLKSRC_MODE_MASK; - altclksrc |= ALTCLKSRC_MODE_ACTIVE; - - /* enable clocks */ - altclksrc |= ALTCLKSRC_ENABLE_INT_MASK | ALTCLKSRC_ENABLE_EXT_MASK; - - writel(altclksrc, &scrm->altclksrc); - - omap_die_id_usbethaddr(); - - return 0; -} - -void set_muxconf_regs(void) -{ - do_set_mux((*ctrl)->control_padconf_core_base, - core_padconf_array_essential, - sizeof(core_padconf_array_essential) / - sizeof(struct pad_conf_entry)); - - do_set_mux((*ctrl)->control_padconf_wkup_base, - wkup_padconf_array_essential, - sizeof(wkup_padconf_array_essential) / - sizeof(struct pad_conf_entry)); - - if (omap_revision() >= OMAP4460_ES1_0) - do_set_mux((*ctrl)->control_padconf_wkup_base, - wkup_padconf_array_essential_4460, - sizeof(wkup_padconf_array_essential_4460) / - sizeof(struct pad_conf_entry)); -} - -#if defined(CONFIG_MMC) -int board_mmc_init(struct bd_info *bis) -{ - return omap_mmc_init(0, 0, 0, -1, -1); -} - -#if !defined(CONFIG_SPL_BUILD) -void board_mmc_power_init(void) -{ - twl6030_power_mmc_init(0); -} -#endif -#endif - -#ifdef CONFIG_REVISION_TAG -/* - * get_board_rev() - get board revision - */ -u32 get_board_rev(void) -{ - return 0x20; -} -#endif diff --git a/board/ti/panda/panda_mux_data.h b/board/ti/panda/panda_mux_data.h deleted file mode 100644 index 3bf6c0146c..0000000000 --- a/board/ti/panda/panda_mux_data.h +++ /dev/null @@ -1,85 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2010 - * Texas Instruments Incorporated, <www.ti.com> - * - * Balaji Krishnamoorthy <balajitk@ti.com> - * Aneesh V <aneesh@ti.com> - */ -#ifndef _PANDA_MUX_DATA_H_ -#define _PANDA_MUX_DATA_H_ - -#include <asm/arch/mux_omap4.h> - -const struct pad_conf_entry core_padconf_array_essential[] = { - -{GPMC_AD0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat0 */ -{GPMC_AD1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat1 */ -{GPMC_AD2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat2 */ -{GPMC_AD3, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat3 */ -{GPMC_AD4, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat4 */ -{GPMC_AD5, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat5 */ -{GPMC_AD6, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat6 */ -{GPMC_AD7, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat7 */ -{GPMC_NOE, (PTU | IEN | OFF_EN | OFF_OUT_PTD | M1)}, /* sdmmc2_clk */ -{GPMC_NWE, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_cmd */ -{SDMMC1_CLK, (PTU | OFF_EN | OFF_OUT_PTD | M0)}, /* sdmmc1_clk */ -{SDMMC1_CMD, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_cmd */ -{SDMMC1_DAT0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat0 */ -{SDMMC1_DAT1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat1 */ -{SDMMC1_DAT2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat2 */ -{SDMMC1_DAT3, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat3 */ -{SDMMC1_DAT4, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat4 */ -{SDMMC1_DAT5, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat5 */ -{SDMMC1_DAT6, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat6 */ -{SDMMC1_DAT7, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat7 */ -{I2C1_SCL, (PTU | IEN | M0)}, /* i2c1_scl */ -{I2C1_SDA, (PTU | IEN | M0)}, /* i2c1_sda */ -{I2C2_SCL, (PTU | IEN | M0)}, /* i2c2_scl */ -{I2C2_SDA, (PTU | IEN | M0)}, /* i2c2_sda */ -{I2C3_SCL, (PTU | IEN | M0)}, /* i2c3_scl */ -{I2C3_SDA, (PTU | IEN | M0)}, /* i2c3_sda */ -{I2C4_SCL, (PTU | IEN | M0)}, /* i2c4_scl */ -{I2C4_SDA, (PTU | IEN | M0)}, /* i2c4_sda */ -{UART3_CTS_RCTX, (PTU | IEN | M0)}, /* uart3_tx */ -{UART3_RTS_SD, (M0)}, /* uart3_rts_sd */ -{UART3_RX_IRRX, (IEN | M0)}, /* uart3_rx */ -{UART3_TX_IRTX, (M0)}, /* uart3_tx */ -{USBB1_ULPITLL_CLK, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M4)},/* usbb1_ulpiphy_clk */ -{USBB1_ULPITLL_STP, (OFF_EN | OFF_OUT_PTD | M4)}, /* usbb1_ulpiphy_stp */ -{USBB1_ULPITLL_DIR, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dir */ -{USBB1_ULPITLL_NXT, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_nxt */ -{USBB1_ULPITLL_DAT0, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat0 */ -{USBB1_ULPITLL_DAT1, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat1 */ -{USBB1_ULPITLL_DAT2, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat2 */ -{USBB1_ULPITLL_DAT3, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat3 */ -{USBB1_ULPITLL_DAT4, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat4 */ -{USBB1_ULPITLL_DAT5, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat5 */ -{USBB1_ULPITLL_DAT6, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat6 */ -{USBB1_ULPITLL_DAT7, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat7 */ -{USBB1_HSIC_DATA, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usbb1_hsic_data */ -{USBB1_HSIC_STROBE, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usbb1_hsic_strobe */ -{USBC1_ICUSB_DP, (IEN | M0)}, /* usbc1_icusb_dp */ -{USBC1_ICUSB_DM, (IEN | M0)}, /* usbc1_icusb_dm */ -{UNIPRO_TY2, (PTU | IEN | M3)}, /* gpio_1 */ -{GPMC_WAIT1, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)}, /* gpio_62 */ -{FREF_CLK2_OUT, (PTU | IEN | M3)}, /* gpio_182 */ - -}; - -const struct pad_conf_entry wkup_padconf_array_essential[] = { - -{PAD1_SR_SCL, (PTU | IEN | M0)}, /* sr_scl */ -{PAD0_SR_SDA, (PTU | IEN | M0)}, /* sr_sda */ -{PAD1_SYS_32K, (IEN | M0)}, /* sys_32k */ -{PAD0_FREF_CLK3_OUT, (M0)}, /* fref_clk3_out */ - -}; - -const struct pad_conf_entry wkup_padconf_array_essential_4460[] = { - -{PAD1_FREF_CLK4_REQ, (M3)}, /* gpio_wk7 for TPS: Mode 3 */ - -}; - -#endif /* _PANDA_MUX_DATA_H_ */ diff --git a/board/ti/sdp4430/Kconfig b/board/ti/sdp4430/Kconfig deleted file mode 100644 index 65e9107bc1..0000000000 --- a/board/ti/sdp4430/Kconfig +++ /dev/null @@ -1,17 +0,0 @@ -if TARGET_OMAP4_SDP4430 - -config SYS_BOARD - default "sdp4430" - -config SYS_VENDOR - default "ti" - -config SYS_CONFIG_NAME - default "omap4_sdp4430" - -config CMD_BAT - bool "Enable board-specific battery command" - -source "board/ti/common/Kconfig" - -endif diff --git a/board/ti/sdp4430/MAINTAINERS b/board/ti/sdp4430/MAINTAINERS deleted file mode 100644 index d8b8fe600e..0000000000 --- a/board/ti/sdp4430/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -SDP4430 BOARD -M: Tom Rini <trini@konsulko.com> -S: Maintained -F: board/ti/sdp4430/ -F: include/configs/omap4_sdp4430.h -F: configs/omap4_sdp4430_defconfig diff --git a/board/ti/sdp4430/Makefile b/board/ti/sdp4430/Makefile deleted file mode 100644 index ae06945612..0000000000 --- a/board/ti/sdp4430/Makefile +++ /dev/null @@ -1,10 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# (C) Copyright 2000, 2001, 2002 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. - -obj-y := sdp.o - -ifndef CONFIG_SPL_BUILD -obj-y += cmd_bat.o -endif diff --git a/board/ti/sdp4430/cmd_bat.c b/board/ti/sdp4430/cmd_bat.c deleted file mode 100644 index 6bf44d9265..0000000000 --- a/board/ti/sdp4430/cmd_bat.c +++ /dev/null @@ -1,40 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2010 Texas Instruments - */ - -#include <command.h> - -#ifdef CONFIG_CMD_BAT -#include <twl6030.h> - -int do_vbat(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) -{ - if (argc == 2) { - if (strncmp(argv[1], "startcharge", 12) == 0) - twl6030_start_usb_charging(); - else if (strncmp(argv[1], "stopcharge", 11) == 0) - twl6030_stop_usb_charging(); - else if (strncmp(argv[1], "status", 7) == 0) { - twl6030_get_battery_voltage(); - twl6030_get_battery_current(); - } else { - goto bat_cmd_usage; - } - } else { - goto bat_cmd_usage; - } - return 0; - -bat_cmd_usage: - return cmd_usage(cmdtp); -} - -U_BOOT_CMD( - bat, 2, 1, do_vbat, - "battery charging, voltage/current measurements", - "status - display battery voltage and current\n" - "bat startcharge - start charging via USB\n" - "bat stopcharge - stop charging\n" -); -#endif /* CONFIG_CMD_BAT */ diff --git a/board/ti/sdp4430/sdp.c b/board/ti/sdp4430/sdp.c deleted file mode 100644 index 1a71390f54..0000000000 --- a/board/ti/sdp4430/sdp.c +++ /dev/null @@ -1,114 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2010 - * Texas Instruments Incorporated, <www.ti.com> - * Aneesh V <aneesh@ti.com> - * Steve Sakoman <steve@sakoman.com> - */ -#include <init.h> -#include <net.h> -#include <twl6030.h> -#include <serial.h> -#include <asm/arch/sys_proto.h> -#include <asm/arch/mmc_host_def.h> -#include <asm/global_data.h> - -#include "sdp4430_mux_data.h" - -DECLARE_GLOBAL_DATA_PTR; - -const struct omap_sysinfo sysinfo = { - "Board: OMAP4430 SDP\n" -}; - -/** - * @brief board_init - * - * Return: 0 - */ -int board_init(void) -{ - gpmc_init(); - - gd->bd->bi_boot_params = (0x80000000 + 0x100); /* boot param addr */ - - return 0; -} - -int board_eth_init(struct bd_info *bis) -{ - return 0; -} - -/** - * @brief misc_init_r - Configure SDP board specific configurations - * such as power configurations, ethernet initialization as phase2 of - * boot sequence - * - * Return: 0 - */ -int misc_init_r(void) -{ -#ifdef CONFIG_TWL6030_POWER - twl6030_init_battery_charging(); -#endif - return 0; -} - -void set_muxconf_regs(void) -{ - do_set_mux((*ctrl)->control_padconf_core_base, - core_padconf_array_essential, - sizeof(core_padconf_array_essential) / - sizeof(struct pad_conf_entry)); - - do_set_mux((*ctrl)->control_padconf_wkup_base, - wkup_padconf_array_essential, - sizeof(wkup_padconf_array_essential) / - sizeof(struct pad_conf_entry)); - - if ((omap_revision() >= OMAP4460_ES1_0) && - (omap_revision() < OMAP4470_ES1_0)) - do_set_mux((*ctrl)->control_padconf_wkup_base, - wkup_padconf_array_essential_4460, - sizeof(wkup_padconf_array_essential_4460) / - sizeof(struct pad_conf_entry)); -} - -#if defined(CONFIG_MMC) -int board_mmc_init(struct bd_info *bis) -{ - omap_mmc_init(0, 0, 0, -1, -1); - omap_mmc_init(1, 0, 0, -1, -1); - return 0; -} - -#if !defined(CONFIG_SPL_BUILD) -void board_mmc_power_init(void) -{ - twl6030_power_mmc_init(0); - twl6030_power_mmc_init(1); -} -#endif -#endif - -#if defined(CONFIG_SPL_OS_BOOT) -int spl_start_uboot(void) -{ - /* break into full u-boot on 'c' */ - if (serial_tstc() && serial_getc() == 'c') - return 1; - - return 0; -} -#endif /* CONFIG_SPL_OS_BOOT */ - -#ifdef CONFIG_REVISION_TAG -/* - * get_board_rev() - get board revision - */ -u32 get_board_rev(void) -{ - return 0x20; -} -#endif diff --git a/board/ti/sdp4430/sdp4430_mux_data.h b/board/ti/sdp4430/sdp4430_mux_data.h deleted file mode 100644 index 934419f40e..0000000000 --- a/board/ti/sdp4430/sdp4430_mux_data.h +++ /dev/null @@ -1,67 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2010 - * Texas Instruments Incorporated, <www.ti.com> - * - * Balaji Krishnamoorthy <balajitk@ti.com> - * Aneesh V <aneesh@ti.com> - */ -#ifndef _SDP4430_MUX_DATA_H -#define _SDP4430_MUX_DATA_H - -#include <asm/arch/mux_omap4.h> - -const struct pad_conf_entry core_padconf_array_essential[] = { - -{GPMC_AD0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat0 */ -{GPMC_AD1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat1 */ -{GPMC_AD2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat2 */ -{GPMC_AD3, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat3 */ -{GPMC_AD4, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat4 */ -{GPMC_AD5, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat5 */ -{GPMC_AD6, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat6 */ -{GPMC_AD7, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat7 */ -{GPMC_NOE, (PTU | IEN | OFF_EN | OFF_OUT_PTD | M1)}, /* sdmmc2_clk */ -{GPMC_NWE, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_cmd */ -{SDMMC1_CLK, (PTU | OFF_EN | OFF_OUT_PTD | M0)}, /* sdmmc1_clk */ -{SDMMC1_CMD, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_cmd */ -{SDMMC1_DAT0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat0 */ -{SDMMC1_DAT1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat1 */ -{SDMMC1_DAT2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat2 */ -{SDMMC1_DAT3, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat3 */ -{SDMMC1_DAT4, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat4 */ -{SDMMC1_DAT5, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat5 */ -{SDMMC1_DAT6, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat6 */ -{SDMMC1_DAT7, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat7 */ -{UART3_CTS_RCTX, (PTU | IEN | M0)}, /* uart3_tx */ -{UART3_RTS_SD, (M0)}, /* uart3_rts_sd */ -{UART3_RX_IRRX, (IEN | M0)}, /* uart3_rx */ -{UART3_TX_IRTX, (M0)}, /* uart3_tx */ -{USBB1_ULPITLL_DAT4, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat4 */ -{USBB1_ULPITLL_DAT5, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat5 */ -{USBB1_ULPITLL_DAT6, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat6 */ -{USBB1_ULPITLL_DAT7, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat7 */ -{USBB1_HSIC_DATA, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usbb1_hsic_data */ -{USBB1_HSIC_STROBE, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usbb1_hsic_strobe */ -{USBC1_ICUSB_DP, (IEN | M0)}, /* usbc1_icusb_dp */ -{USBC1_ICUSB_DM, (IEN | M0)}, /* usbc1_icusb_dm */ -{USBA0_OTG_CE, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M0)}, /* usba0_otg_ce */ -{USBA0_OTG_DP, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usba0_otg_dp */ -{USBA0_OTG_DM, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usba0_otg_dm */ -}; - -const struct pad_conf_entry wkup_padconf_array_essential[] = { - -{PAD1_SR_SCL, (PTU | IEN | M0)}, /* sr_scl */ -{PAD0_SR_SDA, (PTU | IEN | M0)}, /* sr_sda */ -{PAD1_SYS_32K, (IEN | M0)} /* sys_32k */ - -}; - -const struct pad_conf_entry wkup_padconf_array_essential_4460[] = { - -{PAD1_FREF_CLK4_REQ, (M3)}, /* gpio_wk7 for TPS: Mode 3 */ - -}; - -#endif /* _SDP4430_MUX_DATA_H */ diff --git a/board/timll/devkit3250/Kconfig b/board/timll/devkit3250/Kconfig deleted file mode 100644 index 5129c2dcae..0000000000 --- a/board/timll/devkit3250/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if TARGET_DEVKIT3250 - -config SYS_BOARD - default "devkit3250" - -config SYS_VENDOR - default "timll" - -config SYS_CONFIG_NAME - default "devkit3250" - -endif diff --git a/board/timll/devkit3250/MAINTAINERS b/board/timll/devkit3250/MAINTAINERS deleted file mode 100644 index cb93563fed..0000000000 --- a/board/timll/devkit3250/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -DEVKIT3250 BOARD -M: Vladimir Zapolskiy <vz@mleia.com> -S: Maintained -F: board/timll/devkit3250/ -F: include/configs/devkit3250.h -F: configs/devkit3250_defconfig diff --git a/board/timll/devkit3250/Makefile b/board/timll/devkit3250/Makefile deleted file mode 100644 index 056813995e..0000000000 --- a/board/timll/devkit3250/Makefile +++ /dev/null @@ -1,7 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (C) 2011 by Vladimir Zapolskiy <vz@mleia.com> -# Copyright (C) 2008, Guennadi Liakhovetski <lg@denx.de> - -obj-y := devkit3250.o -obj-$(CONFIG_SPL_BUILD) += devkit3250_spl.o diff --git a/board/timll/devkit3250/devkit3250.c b/board/timll/devkit3250/devkit3250.c deleted file mode 100644 index f0c0f03dee..0000000000 --- a/board/timll/devkit3250/devkit3250.c +++ /dev/null @@ -1,83 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Embest/Timll DevKit3250 board support - * - * Copyright (C) 2011-2015 Vladimir Zapolskiy <vz@mleia.com> - */ - -#include <config.h> -#include <init.h> -#include <asm/arch/sys_proto.h> -#include <asm/arch/clk.h> -#include <asm/arch/cpu.h> -#include <asm/arch/emc.h> -#include <asm/arch/wdt.h> -#include <asm/global_data.h> -#include <asm/io.h> -#include <linux/delay.h> - -DECLARE_GLOBAL_DATA_PTR; - -static struct emc_regs *emc = (struct emc_regs *)EMC_BASE; -static struct clk_pm_regs *clk = (struct clk_pm_regs *)CLK_PM_BASE; -static struct wdt_regs *wdt = (struct wdt_regs *)WDT_BASE; - -void reset_periph(void) -{ - /* This function resets peripherals by triggering RESOUT_N */ - setbits_le32(&clk->timclk_ctrl, CLK_TIMCLK_WATCHDOG); - writel(WDTIM_MCTRL_RESFRC1, &wdt->mctrl); - udelay(300); - - writel(0, &wdt->mctrl); - clrbits_le32(&clk->timclk_ctrl, CLK_TIMCLK_WATCHDOG); - - /* Such a long delay is needed to initialize SMSC phy */ - udelay(10000); -} - -int board_early_init_f(void) -{ - lpc32xx_uart_init(CONFIG_CONS_INDEX); - lpc32xx_i2c_init(1); - lpc32xx_i2c_init(2); - lpc32xx_ssp_init(); - lpc32xx_mac_init(); - - /* - * nWP may be controlled by GPO19, but unpopulated by default R23 - * makes no sense to configure this GPIO level, nWP is always high - */ - lpc32xx_slc_nand_init(); - - return 0; -} - -int board_init(void) -{ - /* adress of boot parameters */ - gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100; - -#ifdef CONFIG_SYS_FLASH_CFI - /* Use 16-bit memory interface for NOR Flash */ - emc->stat[0].config = EMC_STAT_CONFIG_PB | EMC_STAT_CONFIG_16BIT; - - /* Change the NOR timings to optimum value to get maximum bandwidth */ - emc->stat[0].waitwen = EMC_STAT_WAITWEN(1); - emc->stat[0].waitoen = EMC_STAT_WAITOEN(0); - emc->stat[0].waitrd = EMC_STAT_WAITRD(12); - emc->stat[0].waitpage = EMC_STAT_WAITPAGE(12); - emc->stat[0].waitwr = EMC_STAT_WAITWR(5); - emc->stat[0].waitturn = EMC_STAT_WAITTURN(2); -#endif - - return 0; -} - -int dram_init(void) -{ - gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE, - CFG_SYS_SDRAM_SIZE); - - return 0; -} diff --git a/board/timll/devkit3250/devkit3250_spl.c b/board/timll/devkit3250/devkit3250_spl.c deleted file mode 100644 index 07a367c3ad..0000000000 --- a/board/timll/devkit3250/devkit3250_spl.c +++ /dev/null @@ -1,66 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Timll DevKit3250 board support, SPL board configuration - * - * (C) Copyright 2015 Vladimir Zapolskiy <vz@mleia.com> - */ - -#include <asm/io.h> -#include <asm/arch/sys_proto.h> -#include <asm/arch/cpu.h> -#include <asm/arch/emc.h> -#include <asm/arch-lpc32xx/gpio.h> -#include <spl.h> - -static struct gpio_regs *gpio = (struct gpio_regs *)GPIO_BASE; - -/* - * SDRAM K4S561632N-LC60 settings are selected in assumption that - * SDRAM clock may be set up to 166 MHz, however at the moment - * it is 104 MHz. Most delay values are converted to be a multiple of - * base clock, and precise pinned values are not needed here. - */ -struct emc_dram_settings dram_64mb = { - .cmddelay = 0x0001C000, - .config0 = 0x00005682, - .rascas0 = 0x00000302, - .rdconfig = 0x00000011, /* undocumented but crucial value */ - - .trp = 83333333, - .tras = 23809524, - .tsrex = 12500000, - .twr = 83000000, /* tWR = tRDL = 2 CLK */ - .trc = 15384616, - .trfc = 15384616, - .txsr = 12500000, - .trrd = 1, - .tmrd = 1, - .tcdlr = 0, - - .refresh = 130000, /* 800 clock cycles */ - - .mode = 0x00018000, - .emode = 0x02000000, -}; - -void spl_board_init(void) -{ - /* First of all silence buzzer controlled by GPO_20 */ - writel((1 << 20), &gpio->p3_outp_clr); - - lpc32xx_uart_init(CONFIG_CONS_INDEX); - preloader_console_init(); - - ddr_init(&dram_64mb); - - /* - * NAND initialization is done by nand_init(), - * here just enable NAND SLC clocks - */ - lpc32xx_slc_nand_init(); -} - -u32 spl_boot_device(void) -{ - return BOOT_DEVICE_NAND; -} |