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authorZong Li <zong.li@sifive.com>2021-07-20 14:26:08 +0800
committerLeo Yu-Chi Liang <ycliang@andestech.com>2021-07-21 16:39:57 +0800
commite52b83ab13de0a19f3bdba8a4f29214c436ea7f2 (patch)
tree9a28c8ffaf4ec4b6517c9949136e95bb74bc87b3 /board/sifive
parent6ba8eeb6f17c08a7a7fd97683161330d01a8ef2e (diff)
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board: sifive: drop stuff related to unmatched revision 1
This patch reverts the following commits: - 4b4159d0f3 ("riscv: dts: add dts for unmatched rev1") - ffe9a394df ("board: sifive: support spl multi-dtb on unmatched board") We won't plan to support unmatched that the revision below 3 in u-boot, so they can be dropped because they might be useless. Changed in v2: - rebase codebase to the latest master branch Signed-off-by: Zong Li <zong.li@sifive.com> Suggested-by: David Abdurachmanov <david.abdurachmanov@sifive.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Diffstat (limited to 'board/sifive')
-rw-r--r--board/sifive/unmatched/spl.c28
1 files changed, 2 insertions, 26 deletions
diff --git a/board/sifive/unmatched/spl.c b/board/sifive/unmatched/spl.c
index 74134b03ee..5e1333b09a 100644
--- a/board/sifive/unmatched/spl.c
+++ b/board/sifive/unmatched/spl.c
@@ -10,14 +10,11 @@
#include <spl.h>
#include <misc.h>
#include <log.h>
-#include <fdtdec.h>
-#include <dm/root.h>
#include <linux/delay.h>
#include <linux/io.h>
#include <asm/gpio.h>
#include <asm/arch/gpio.h>
#include <asm/arch/spl.h>
-#include <asm/arch/eeprom.h>
#define GEM_PHY_RESET SIFIVE_GENERIC_GPIO_NR(0, 12)
@@ -29,16 +26,6 @@ int spl_board_init_f(void)
{
int ret;
-#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_MULTI_DTB_FIT)
- int rescan;
-
- ret = fdtdec_resetup(&rescan);
- if (!ret && rescan) {
- dm_uninit();
- dm_init_and_scan(true);
- }
-#endif
-
ret = spl_soc_init();
if (ret) {
debug("HiFive Unmatched FU740 SPL init failed: %d\n", ret);
@@ -92,18 +79,7 @@ u32 spl_boot_device(void)
#ifdef CONFIG_SPL_LOAD_FIT
int board_fit_config_name_match(const char *name)
{
- /*
- * Apply different DDR params on different board revision.
- * Use PCB revision which is byte 0x7 in I2C platform EEPROM
- * to distinguish that.
- */
- if (get_pcb_revision_from_eeprom() == PCB_REVISION_REV3 &&
- !strcmp(name, "hifive-unmatched-a00"))
- return 0;
- else if (get_pcb_revision_from_eeprom() != PCB_REVISION_REV3 &&
- !strcmp(name, "hifive-unmatched-a00-rev1"))
- return 0;
-
- return -1;
+ /* boot using first FIT config */
+ return 0;
}
#endif