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authorTom Rini <trini@konsulko.com>2022-07-11 10:18:13 -0400
committerTom Rini <trini@konsulko.com>2022-07-11 14:58:57 -0400
commit36b661dc919da318c163a45f4a220d2e3d9db608 (patch)
tree268703050f58280feb3287d48eb0cedc974730e1 /board/kontron
parente092e3250270a1016c877da7bdd9384f14b1321e (diff)
parent05a4859637567b13219efd6f1707fb236648b1b7 (diff)
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Merge branch 'next'
Diffstat (limited to 'board/kontron')
-rw-r--r--board/kontron/sl-mx8mm/spl.c30
-rw-r--r--board/kontron/sl28/ddr.c12
2 files changed, 12 insertions, 30 deletions
diff --git a/board/kontron/sl-mx8mm/spl.c b/board/kontron/sl-mx8mm/spl.c
index 5a513722c5..09f81351dd 100644
--- a/board/kontron/sl-mx8mm/spl.c
+++ b/board/kontron/sl-mx8mm/spl.c
@@ -35,8 +35,6 @@ enum {
#define GPIO_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
#define I2C_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE)
-#define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1)
-#define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
#define TOUCH_RESET_GPIO IMX_GPIO_NR(3, 23)
@@ -54,15 +52,6 @@ static iomux_v3_cfg_t const touch_gpio[] = {
IMX8MM_PAD_SAI5_RXD2_GPIO3_IO23 | MUX_PAD_CTRL(GPIO_PAD_CTRL)
};
-static iomux_v3_cfg_t const uart_pads[] = {
- IMX8MM_PAD_UART3_RXD_UART3_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
- IMX8MM_PAD_UART3_TXD_UART3_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
-static iomux_v3_cfg_t const wdog_pads[] = {
- IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL),
-};
-
int spl_board_boot_device(enum boot_device boot_dev_spl)
{
switch (boot_dev_spl) {
@@ -231,19 +220,6 @@ void spl_board_init(void)
printf("Failed to find clock node. Check device tree\n");
}
-int board_early_init_f(void)
-{
- struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR;
-
- imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
-
- set_wdog_reset(wdog);
-
- imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
-
- return 0;
-}
-
static int power_init_board(void)
{
struct udevice *dev;
@@ -278,12 +254,8 @@ void board_init_f(ulong dummy)
init_uart_clk(2);
- board_early_init_f();
-
timer_init();
- preloader_console_init();
-
/* Clear the BSS. */
memset(__bss_start, 0, __bss_end - __bss_start);
@@ -293,6 +265,8 @@ void board_init_f(ulong dummy)
hang();
}
+ preloader_console_init();
+
enable_tzc380();
/* PMIC initialization */
diff --git a/board/kontron/sl28/ddr.c b/board/kontron/sl28/ddr.c
index 41426996ab..315d9f99c7 100644
--- a/board/kontron/sl28/ddr.c
+++ b/board/kontron/sl28/ddr.c
@@ -54,6 +54,9 @@ static fsl_ddr_cfg_regs_t __maybe_unused ddr_cfg_regs = {
.ddr_cdr1 = 0x80040000,
.ddr_cdr2 = 0x0000bc01,
+
+ /* Erratum A-009942, set optimal CPO value */
+ .debug[28] = 0x00700040,
};
int fsl_initdram(void)
@@ -66,11 +69,17 @@ int fsl_initdram(void)
dram_size = 0x80000000;
ddr_cfg_regs.cs[1].bnds = 0;
ddr_cfg_regs.cs[1].config = 0;
- ddr_cfg_regs.cs[1].config_2 = 0;
break;
case GPPORCR1_MEM_4GB_CS0_1:
dram_size = 0x100000000ULL;
break;
+ case GPPORCR1_MEM_8GB_CS0_1:
+ dram_size = 0x200000000ULL;
+ ddr_cfg_regs.cs[0].bnds = 0x000000ff;
+ ddr_cfg_regs.cs[0].config = 0x80044403;
+ ddr_cfg_regs.cs[1].bnds = 0x010001ff;
+ ddr_cfg_regs.cs[1].config = 0x80044403;
+ break;
case GPPORCR1_MEM_512MB_CS0:
dram_size = 0x20000000;
fallthrough; /* for now */
@@ -80,7 +89,6 @@ int fsl_initdram(void)
case GPPORCR1_MEM_4GB_CS0_2:
dram_size = 0x100000000ULL;
fallthrough; /* for now */
- case GPPORCR1_MEM_8GB_CS0_1:
case GPPORCR1_MEM_8GB_CS0_1_2_3:
dram_size = 0x200000000ULL;
fallthrough; /* for now */