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author | Marcin Niestroj <m.niestroj@grinn-global.com> | 2017-01-25 09:53:08 +0100 |
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committer | Tom Rini <trini@konsulko.com> | 2017-01-28 14:04:37 -0500 |
commit | ab38bf6a3909bc773cbeec7b3997ba4686e6f93e (patch) | |
tree | 86f77079993081207cf745997d39abe1b7e62a07 /board/grinn | |
parent | a73c8b32a745d70c18868b24a8d4cfdd17f22db1 (diff) | |
download | u-boot-ab38bf6a3909bc773cbeec7b3997ba4686e6f93e.tar.gz u-boot-ab38bf6a3909bc773cbeec7b3997ba4686e6f93e.tar.bz2 u-boot-ab38bf6a3909bc773cbeec7b3997ba4686e6f93e.zip |
board/chiliboard: Add support for chiliBoard
chiliBoard is a development board which uses chiliSOM as its base.
Hardware specification:
* chiliSOM (TI AM335x, DRAM, NAND)
* Ethernet PHY (id 0)
* USB host (usb1)
* MicroSD slot (mmc0)
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'board/grinn')
-rw-r--r-- | board/grinn/chiliboard/Kconfig | 15 | ||||
-rw-r--r-- | board/grinn/chiliboard/MAINTAINERS | 8 | ||||
-rw-r--r-- | board/grinn/chiliboard/Makefile | 6 | ||||
-rw-r--r-- | board/grinn/chiliboard/README | 31 | ||||
-rw-r--r-- | board/grinn/chiliboard/board.c | 206 |
5 files changed, 266 insertions, 0 deletions
diff --git a/board/grinn/chiliboard/Kconfig b/board/grinn/chiliboard/Kconfig new file mode 100644 index 0000000000..20056e81a1 --- /dev/null +++ b/board/grinn/chiliboard/Kconfig @@ -0,0 +1,15 @@ +if TARGET_CHILIBOARD + +config SYS_BOARD + default "chiliboard" + +config SYS_VENDOR + default "grinn" + +config SYS_CONFIG_NAME + default "chiliboard" + +config SYS_SOC + default "am33xx" + +endif diff --git a/board/grinn/chiliboard/MAINTAINERS b/board/grinn/chiliboard/MAINTAINERS new file mode 100644 index 0000000000..5eaccb2791 --- /dev/null +++ b/board/grinn/chiliboard/MAINTAINERS @@ -0,0 +1,8 @@ +CHILIBOARD +M: Marcin Niestroj <m.niestroj@grinn-global.com> +S: Maintained +F: arch/arm/include/asm/arch-am33xx/chilisom.h +F: arch/arm/mach-omap2/am33xx/chilisom.c +F: board/grinn/chiliboard/ +F: include/configs/chiliboard.h +F: configs/chiliboard_defconfig diff --git a/board/grinn/chiliboard/Makefile b/board/grinn/chiliboard/Makefile new file mode 100644 index 0000000000..865968d1a7 --- /dev/null +++ b/board/grinn/chiliboard/Makefile @@ -0,0 +1,6 @@ +# (C) Copyright 2017 Grinn +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := board.o diff --git a/board/grinn/chiliboard/README b/board/grinn/chiliboard/README new file mode 100644 index 0000000000..cea4c1d42e --- /dev/null +++ b/board/grinn/chiliboard/README @@ -0,0 +1,31 @@ +How to use U-Boot on Grinn's chiliBoard +-------------------------------------- + +- Build U-Boot for chiliBoard: + +$ make mrproper +$ make chiliboard_defconfig +$ make + +This will generate the SPL image called MLO and the u-boot.img. + +- Flash the SPL image into the micro SD card: + +sudo dd if=MLO of=/dev/mmcblk0 bs=128k; sync + +- Flash the u-boot.img image into the micro SD card: + +sudo dd if=u-boot.img of=/dev/mmcblk0 bs=128k seek=3; sync + +- Jumper settings: + +S2: 1 1 1 0 1 0 + +where 0 means bottom position and 1 means top position (from the +switch label numbers reference). + +- Insert the micro SD card in the board. + +- Connect USB cable between chiliBoard and the PC for the power and console. + +- U-Boot messages should come up. diff --git a/board/grinn/chiliboard/board.c b/board/grinn/chiliboard/board.c new file mode 100644 index 0000000000..e3f82b0a80 --- /dev/null +++ b/board/grinn/chiliboard/board.c @@ -0,0 +1,206 @@ +/* + * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2017, Grinn - http://grinn-global.com/ + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/arch/chilisom.h> +#include <asm/arch/cpu.h> +#include <asm/arch/hardware.h> +#include <asm/arch/omap.h> +#include <asm/arch/mem.h> +#include <asm/arch/mmc_host_def.h> +#include <asm/arch/mux.h> +#include <asm/arch/sys_proto.h> +#include <asm/emif.h> +#include <asm/io.h> +#include <cpsw.h> +#include <environment.h> +#include <errno.h> +#include <miiphy.h> +#include <serial.h> +#include <spl.h> +#include <watchdog.h> + +DECLARE_GLOBAL_DATA_PTR; + +static __maybe_unused struct ctrl_dev *cdev = + (struct ctrl_dev *)CTRL_DEVICE_BASE; + +#ifndef CONFIG_SKIP_LOWLEVEL_INIT +static struct module_pin_mux uart0_pin_mux[] = { + {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART0_RXD */ + {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */ + {-1}, +}; + +static struct module_pin_mux mmc0_pin_mux[] = { + {OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT3 */ + {OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT2 */ + {OFFSET(mmc0_dat1), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT1 */ + {OFFSET(mmc0_dat0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT0 */ + {OFFSET(mmc0_clk), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CLK */ + {OFFSET(mmc0_cmd), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CMD */ + {-1}, +}; + +static struct module_pin_mux rmii1_pin_mux[] = { + {OFFSET(mii1_crs), MODE(1) | RXACTIVE}, /* RMII1_CRS */ + {OFFSET(mii1_rxerr), MODE(1) | RXACTIVE}, /* RMII1_RXERR */ + {OFFSET(mii1_txen), MODE(1)}, /* RMII1_TXEN */ + {OFFSET(mii1_txd1), MODE(1)}, /* RMII1_TXD1 */ + {OFFSET(mii1_txd0), MODE(1)}, /* RMII1_TXD0 */ + {OFFSET(mii1_rxd1), MODE(1) | RXACTIVE}, /* RMII1_RXD1 */ + {OFFSET(mii1_rxd0), MODE(1) | RXACTIVE}, /* RMII1_RXD0 */ + {OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN}, /* MDIO_DATA */ + {OFFSET(mdio_clk), MODE(0) | PULLUP_EN}, /* MDIO_CLK */ + {OFFSET(rmii1_refclk), MODE(0) | RXACTIVE}, /* RMII1_REFCLK */ + {-1}, +}; + +static void enable_board_pin_mux(void) +{ + chilisom_enable_pin_mux(); + + /* chiliboard pinmux */ + configure_module_pin_mux(rmii1_pin_mux); + configure_module_pin_mux(mmc0_pin_mux); +} +#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ + +#ifndef CONFIG_DM_SERIAL +struct serial_device *default_serial_console(void) +{ + return &eserial1_device; +} +#endif + +#ifndef CONFIG_SKIP_LOWLEVEL_INIT +void set_uart_mux_conf(void) +{ + configure_module_pin_mux(uart0_pin_mux); +} + +void set_mux_conf_regs(void) +{ + enable_board_pin_mux(); +} + +void am33xx_spl_board_init(void) +{ + chilisom_spl_board_init(); +} +#endif + +/* + * Basic board specific setup. Pinmux has been handled already. + */ +int board_init(void) +{ +#if defined(CONFIG_HW_WATCHDOG) + hw_watchdog_init(); +#endif + + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; + gpmc_init(); + + return 0; +} + +#ifdef CONFIG_BOARD_LATE_INIT +int board_late_init(void) +{ +#if !defined(CONFIG_SPL_BUILD) + uint8_t mac_addr[6]; + uint32_t mac_hi, mac_lo; + + /* try reading mac address from efuse */ + mac_lo = readl(&cdev->macid0l); + mac_hi = readl(&cdev->macid0h); + mac_addr[0] = mac_hi & 0xFF; + mac_addr[1] = (mac_hi & 0xFF00) >> 8; + mac_addr[2] = (mac_hi & 0xFF0000) >> 16; + mac_addr[3] = (mac_hi & 0xFF000000) >> 24; + mac_addr[4] = mac_lo & 0xFF; + mac_addr[5] = (mac_lo & 0xFF00) >> 8; + + if (!getenv("ethaddr")) { + printf("<ethaddr> not set. Validating first E-fuse MAC\n"); + + if (is_valid_ethaddr(mac_addr)) + eth_setenv_enetaddr("ethaddr", mac_addr); + } + + mac_lo = readl(&cdev->macid1l); + mac_hi = readl(&cdev->macid1h); + mac_addr[0] = mac_hi & 0xFF; + mac_addr[1] = (mac_hi & 0xFF00) >> 8; + mac_addr[2] = (mac_hi & 0xFF0000) >> 16; + mac_addr[3] = (mac_hi & 0xFF000000) >> 24; + mac_addr[4] = mac_lo & 0xFF; + mac_addr[5] = (mac_lo & 0xFF00) >> 8; + + if (!getenv("eth1addr")) { + if (is_valid_ethaddr(mac_addr)) + eth_setenv_enetaddr("eth1addr", mac_addr); + } +#endif + + return 0; +} +#endif + +#if !defined(CONFIG_DM_ETH) && defined(CONFIG_DRIVER_TI_CPSW) && \ + !defined(CONFIG_SPL_BUILD) +static void cpsw_control(int enabled) +{ + /* VTP can be added here */ + + return; +} + +static struct cpsw_slave_data cpsw_slaves[] = { + { + .slave_reg_ofs = 0x208, + .sliver_reg_ofs = 0xd80, + .phy_addr = 0, + } +}; + +static struct cpsw_platform_data cpsw_data = { + .mdio_base = CPSW_MDIO_BASE, + .cpsw_base = CPSW_BASE, + .mdio_div = 0xff, + .channels = 8, + .cpdma_reg_ofs = 0x800, + .slaves = 1, + .slave_data = cpsw_slaves, + .ale_reg_ofs = 0xd00, + .ale_entries = 1024, + .host_port_reg_ofs = 0x108, + .hw_stats_reg_ofs = 0x900, + .bd_ram_ofs = 0x2000, + .mac_control = (1 << 5), + .control = cpsw_control, + .host_port_num = 0, + .version = CPSW_CTRL_VERSION_2, +}; + +int board_eth_init(bd_t *bis) +{ + int rv, n = 0; + + writel(RMII_MODE_ENABLE | RMII_CHIPCKL_ENABLE, &cdev->miisel); + cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_RMII; + + rv = cpsw_register(&cpsw_data); + if (rv < 0) + printf("Error %d registering CPSW switch\n", rv); + else + n += rv; + + return n; +} +#endif |