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| author | Marek Vasut <marex@denx.de> | 2022-08-23 19:27:08 +0200 |
|---|---|---|
| committer | Patrick Delaunay <patrick.delaunay@foss.st.com> | 2022-09-06 15:33:07 +0200 |
| commit | 9cccc358c4a2f539746bc98c741e714cc7d9b5d2 (patch) | |
| tree | c6be4bd90f2f5eac7745256fe44440e30db21bf7 /board/dhelectronics | |
| parent | 29e03c98cfe196e3339090b07566d9889774ca0e (diff) | |
| download | u-boot-9cccc358c4a2f539746bc98c741e714cc7d9b5d2.tar.gz u-boot-9cccc358c4a2f539746bc98c741e714cc7d9b5d2.tar.bz2 u-boot-9cccc358c4a2f539746bc98c741e714cc7d9b5d2.zip | |
ARM: stm32: Switch DHSOM to FMC2 EBI driver
Perform long overdue conversion of ad-hoc FMC2 EBI bus initialization
to upstream FMC2 EBI driver. No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Diffstat (limited to 'board/dhelectronics')
| -rw-r--r-- | board/dhelectronics/dh_stm32mp1/board.c | 52 |
1 files changed, 0 insertions, 52 deletions
diff --git a/board/dhelectronics/dh_stm32mp1/board.c b/board/dhelectronics/dh_stm32mp1/board.c index e3c7ed1049..9188f5381e 100644 --- a/board/dhelectronics/dh_stm32mp1/board.c +++ b/board/dhelectronics/dh_stm32mp1/board.c @@ -527,56 +527,6 @@ static void sysconf_init(void) #endif } -static void board_init_fmc2(void) -{ -#define STM32_FMC2_BCR1 0x0 -#define STM32_FMC2_BTR1 0x4 -#define STM32_FMC2_BWTR1 0x104 -#define STM32_FMC2_BCR(x) ((x) * 0x8 + STM32_FMC2_BCR1) -#define STM32_FMC2_BCRx_FMCEN BIT(31) -#define STM32_FMC2_BCRx_WREN BIT(12) -#define STM32_FMC2_BCRx_RSVD BIT(7) -#define STM32_FMC2_BCRx_FACCEN BIT(6) -#define STM32_FMC2_BCRx_MWID(n) ((n) << 4) -#define STM32_FMC2_BCRx_MTYP(n) ((n) << 2) -#define STM32_FMC2_BCRx_MUXEN BIT(1) -#define STM32_FMC2_BCRx_MBKEN BIT(0) -#define STM32_FMC2_BTR(x) ((x) * 0x8 + STM32_FMC2_BTR1) -#define STM32_FMC2_BTRx_DATAHLD(n) ((n) << 30) -#define STM32_FMC2_BTRx_BUSTURN(n) ((n) << 16) -#define STM32_FMC2_BTRx_DATAST(n) ((n) << 8) -#define STM32_FMC2_BTRx_ADDHLD(n) ((n) << 4) -#define STM32_FMC2_BTRx_ADDSET(n) ((n) << 0) - -#define RCC_MP_AHB6RSTCLRR 0x218 -#define RCC_MP_AHB6RSTCLRR_FMCRST BIT(12) -#define RCC_MP_AHB6ENSETR 0x19c -#define RCC_MP_AHB6ENSETR_FMCEN BIT(12) - - const u32 bcr = STM32_FMC2_BCRx_WREN |STM32_FMC2_BCRx_RSVD | - STM32_FMC2_BCRx_FACCEN | STM32_FMC2_BCRx_MWID(1) | - STM32_FMC2_BCRx_MTYP(2) | STM32_FMC2_BCRx_MUXEN | - STM32_FMC2_BCRx_MBKEN; - const u32 btr = STM32_FMC2_BTRx_DATAHLD(3) | - STM32_FMC2_BTRx_BUSTURN(2) | - STM32_FMC2_BTRx_DATAST(0x22) | - STM32_FMC2_BTRx_ADDHLD(2) | - STM32_FMC2_BTRx_ADDSET(2); - - /* Set up FMC2 bus for KS8851-16MLL and X11 SRAM */ - writel(RCC_MP_AHB6RSTCLRR_FMCRST, STM32_RCC_BASE + RCC_MP_AHB6RSTCLRR); - writel(RCC_MP_AHB6ENSETR_FMCEN, STM32_RCC_BASE + RCC_MP_AHB6ENSETR); - - /* KS8851-16MLL -- Muxed mode */ - writel(bcr, STM32_FMC2_BASE + STM32_FMC2_BCR(1)); - writel(btr, STM32_FMC2_BASE + STM32_FMC2_BTR(1)); - /* AS7C34098 SRAM on X11 -- Muxed mode */ - writel(bcr, STM32_FMC2_BASE + STM32_FMC2_BCR(3)); - writel(btr, STM32_FMC2_BASE + STM32_FMC2_BTR(3)); - - setbits_le32(STM32_FMC2_BASE + STM32_FMC2_BCR1, STM32_FMC2_BCRx_FMCEN); -} - #ifdef CONFIG_DM_REGULATOR #define STPMIC_NVM_BUCKS_VOUT_SHR 0xfc #define STPMIC_NVM_BUCKS_VOUT_SHR_BUCK_1V2 0 @@ -671,8 +621,6 @@ int board_init(void) sysconf_init(); - board_init_fmc2(); - return 0; } |