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| author | Yu Chien Peter Lin <peterlin@andestech.com> | 2022-11-05 14:02:14 +0800 |
|---|---|---|
| committer | Leo Yu-Chi Liang <ycliang@andestech.com> | 2022-11-15 15:37:17 +0800 |
| commit | c277c787a09254ebdf919c7cfc94631fe854677d (patch) | |
| tree | ccddb10d9ec9df6d43bc2c7ec481b577db1c045c /arch | |
| parent | 3f3527044d7460543b69931c3385925119dcf945 (diff) | |
| download | u-boot-c277c787a09254ebdf919c7cfc94631fe854677d.tar.gz u-boot-c277c787a09254ebdf919c7cfc94631fe854677d.tar.bz2 u-boot-c277c787a09254ebdf919c7cfc94631fe854677d.zip | |
riscv: Fix detecting FPU support in standard extension
We should check the string until it hits underscore, in case it
searches multi-letter extensions. For example, "rv64imac_xandes"
will be treated as D extension support since there is a "d" in
"andes", resulting illegal instruction caused by initializing FCSR.
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/riscv/cpu/cpu.c | 14 |
1 files changed, 11 insertions, 3 deletions
diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c index 52ab02519f..d34c8efce0 100644 --- a/arch/riscv/cpu/cpu.c +++ b/arch/riscv/cpu/cpu.c @@ -36,6 +36,7 @@ static inline bool supports_extension(char ext) #ifdef CONFIG_CPU struct udevice *dev; char desc[32]; + int i; uclass_find_first_device(UCLASS_CPU, &dev); if (!dev) { @@ -43,9 +44,16 @@ static inline bool supports_extension(char ext) return false; } if (!cpu_get_desc(dev, desc, sizeof(desc))) { - /* skip the first 4 characters (rv32|rv64) */ - if (strchr(desc + 4, ext)) - return true; + /* + * skip the first 4 characters (rv32|rv64) and + * check until underscore + */ + for (i = 4; i < sizeof(desc); i++) { + if (desc[i] == '_' || desc[i] == '\0') + break; + if (desc[i] == ext) + return true; + } } return false; |