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author | Patrick Wildt <patrick@blueri.se> | 2019-11-19 09:42:06 +0100 |
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committer | Stefano Babic <sbabic@denx.de> | 2019-12-09 11:52:06 +0100 |
commit | 6a4b07e08605ad171823021aa158b6b9bebfc6e6 (patch) | |
tree | fd622633ee3371708fd0f20f8ac4db4cc9e836d7 /arch | |
parent | 5c1c7c1ef81503ccae531704ac9dbd8cb41e5b49 (diff) | |
download | u-boot-6a4b07e08605ad171823021aa158b6b9bebfc6e6.tar.gz u-boot-6a4b07e08605ad171823021aa158b6b9bebfc6e6.tar.bz2 u-boot-6a4b07e08605ad171823021aa158b6b9bebfc6e6.zip |
imx8m: fix rom version check to unbreak some B0 chips
Recently the version check was improved to be able to determine that
we're running on SoC revision 2.1. A check for B0 was tightened so
that it now must equal 0x20 instead of being bigger than 0x20. On
some B0 chips the value returned is 0x1020 instead of 0x20. This
means even though it's B0, the check will fail and code relying on
the correct chip revision will make wrong decisions. There is no
documentation of those bits, but it seems that NXP always uses a
byte to encode the revision. Thus remove the upper bits to fix the
regression.
Signed-off-by: Patrick Wildt <patrick@blueri.se>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-imx/imx8m/soc.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c index 181c715be3..5ce5a180e8 100644 --- a/arch/arm/mach-imx/imx8m/soc.c +++ b/arch/arm/mach-imx/imx8m/soc.c @@ -217,6 +217,7 @@ u32 get_cpu_rev(void) readl((void __iomem *)ROM_VERSION_A0); if (rom_version != CHIP_REV_1_0) { rom_version = readl((void __iomem *)ROM_VERSION_B0); + rom_version &= 0xff; if (rom_version == CHIP_REV_2_0) reg = CHIP_REV_2_0; } |