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| author | Marek Vasut <marex@denx.de> | 2020-04-27 13:16:02 +0200 |
|---|---|---|
| committer | Patrick Delaunay <patrick.delaunay@st.com> | 2020-05-14 09:02:12 +0200 |
| commit | 1ca501741831e3ab8366ddd4d7f74f27e5fe14c6 (patch) | |
| tree | 1dc3e3701bdf7716eafe4b6584039b911b125a62 /arch | |
| parent | 5eff168470a353f3397a0bf43e87c8830fe5bbbd (diff) | |
| download | u-boot-1ca501741831e3ab8366ddd4d7f74f27e5fe14c6.tar.gz u-boot-1ca501741831e3ab8366ddd4d7f74f27e5fe14c6.tar.bz2 u-boot-1ca501741831e3ab8366ddd4d7f74f27e5fe14c6.zip | |
ARM: dts: stm32: Fix AV96 and DHCOR split
The commit 132e5b68986d ("ARM: dts: stm32: Split AV96 into DHCOR SoM
and AV96 board") was not applied correctly and in full, and omitted
an important split of the SoM into 3V3 and 1V8 options. The Avenger96
board is based on the 1V8 IO option of the DHCOR SoM, however this is
an optional modification of the 3V3 IO DHCOR SoM with extra on-SoM
regulator to cater for the 96boards 1V8 IO requirements.
Reinstate the split between the 1V8 and 3V3 IO variants.
Fixes: 132e5b68986d ("ARM: dts: stm32: Split AV96 into DHCOR SoM and AV96 board")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts | 2 | ||||
| -rw-r--r-- | arch/arm/dts/stm32mp15xx-dhcor-io1v8.dtsi | 24 | ||||
| -rw-r--r-- | arch/arm/dts/stm32mp15xx-dhcor-io3v3.dtsi (renamed from arch/arm/dts/stm32mp15xx-dhcor.dtsi) | 13 |
3 files changed, 26 insertions, 13 deletions
diff --git a/arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts b/arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts index a600677563..1b0579c8ab 100644 --- a/arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts +++ b/arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts @@ -7,7 +7,7 @@ /dts-v1/; -#include "stm32mp15xx-dhcor.dtsi" +#include "stm32mp15xx-dhcor-io1v8.dtsi" #include "stm32mp15xx-dhcor-avenger96-u-boot.dtsi" / { diff --git a/arch/arm/dts/stm32mp15xx-dhcor-io1v8.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-io1v8.dtsi new file mode 100644 index 0000000000..75435424d6 --- /dev/null +++ b/arch/arm/dts/stm32mp15xx-dhcor-io1v8.dtsi @@ -0,0 +1,24 @@ +// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) +/* + * Copyright (C) 2020 Marek Vasut <marex@denx.de> + */ + +#include "stm32mp15xx-dhcor-io3v3.dtsi" + +/ { + /* Enpirion EP3A8LQI U2 on the 1V8 IO DHCOR */ + vdd_io: regulator-buck-io { + compatible = "regulator-fixed"; + regulator-name = "buck-io"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vdd>; + }; +}; + +&pwr_regulators { + vdd-supply = <&vdd_io>; + vdd_3v3_usbfs-supply = <&vdd_usb>; +}; diff --git a/arch/arm/dts/stm32mp15xx-dhcor.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-io3v3.dtsi index 97d370e119..248fc455e3 100644 --- a/arch/arm/dts/stm32mp15xx-dhcor.dtsi +++ b/arch/arm/dts/stm32mp15xx-dhcor-io3v3.dtsi @@ -21,17 +21,6 @@ device_type = "memory"; reg = <0xc0000000 0x40000000>; }; - - /* Enpirion EP3A8LQI U2 on the DHCOR */ - vdd_io: regulator-buck-io { - compatible = "regulator-fixed"; - regulator-name = "buck-io"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vdd>; - }; }; &i2c4 { @@ -200,7 +189,7 @@ }; &pwr_regulators { - vdd-supply = <&vdd_io>; + vdd-supply = <&vdd>; vdd_3v3_usbfs-supply = <&vdd_usb>; }; |