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authorSiew Chin Lim <elly.siew.chin.lim@intel.com>2021-08-10 11:26:27 +0800
committerTien Fong Chee <tien.fong.chee@intel.com>2021-08-24 15:11:34 +0800
commitbdba67ba87787d2d6b1d5208cb8dbe22428a87c9 (patch)
tree0da6813e37766e3162ed244e1b7244b90daa6d84 /arch
parent510c277a2e0a16e19dda52e488a0b51d501b7237 (diff)
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arm: socfpga: Changed base_addr_s10.h to base_addr_soc64.h
Rename to common file name to used by all SOC64 devices and change "_S10_" to "_SOC64_" in base_addr_soc64.h. Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-socfpga/include/mach/base_addr_soc64.h (renamed from arch/arm/mach-socfpga/include/mach/base_addr_s10.h)8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/mach-socfpga/include/mach/base_addr_s10.h b/arch/arm/mach-socfpga/include/mach/base_addr_soc64.h
index d3eca65e97..f89066d771 100644
--- a/arch/arm/mach-socfpga/include/mach/base_addr_s10.h
+++ b/arch/arm/mach-socfpga/include/mach/base_addr_soc64.h
@@ -1,10 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
- * Copyright (C) 2016-2017 Intel Corporation <www.intel.com>
+ * Copyright (C) 2016-2021 Intel Corporation <www.intel.com>
*/
-#ifndef _SOCFPGA_S10_BASE_HARDWARE_H_
-#define _SOCFPGA_S10_BASE_HARDWARE_H_
+#ifndef _SOCFPGA_SOC64_BASE_HARDWARE_H_
+#define _SOCFPGA_SOC64_BASE_HARDWARE_H_
#define SOCFPGA_CCU_ADDRESS 0xf7000000
#define SOCFPGA_SDR_SCHEDULER_ADDRESS 0xf8000400
@@ -44,4 +44,4 @@
#define GICD_BASE 0xfffc1000
#define GICC_BASE 0xfffc2000
-#endif /* _SOCFPGA_S10_BASE_HARDWARE_H_ */
+#endif /* _SOCFPGA_SOC64_BASE_HARDWARE_H_ */