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authorChee Hong Ang <chee.hong.ang@intel.com>2018-08-20 10:57:34 -0700
committerTom Rini <trini@konsulko.com>2018-11-16 13:34:33 -0500
commita7aab5bcb545950a25f1a9459a6c0acc7ac75b1e (patch)
tree6088143c515d0563f643537f93574e556b0d7053 /arch
parentf1cd696160f311e39f9c151531aeb3700556ad3d (diff)
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ARMv8: Enable all asynchronous abort exceptions taken to EL3
Allow EL3 to handle all the External Abort and SError interrupt exception occur in all exception levels. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/include/asm/macro.h4
-rw-r--r--arch/arm/include/asm/system.h1
2 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/include/asm/macro.h b/arch/arm/include/asm/macro.h
index d5a7a8bb61..bb33b4bc89 100644
--- a/arch/arm/include/asm/macro.h
+++ b/arch/arm/include/asm/macro.h
@@ -193,6 +193,10 @@ lr .req x30
SCR_EL3_SMD_DIS | SCR_EL3_RES1 |\
SCR_EL3_NS_EN)
#endif
+
+#ifdef CONFIG_ARMV8_EA_EL3_FIRST
+ orr \tmp, \tmp, #SCR_EL3_EA_EN
+#endif
msr scr_el3, \tmp
/* Return to the EL2_SP2 mode from EL3 */
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index c1f87f9caf..aed2e3c51e 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -29,6 +29,7 @@
#define SCR_EL3_HCE_EN (1 << 8) /* Hypervisor Call enable */
#define SCR_EL3_SMD_DIS (1 << 7) /* Secure Monitor Call disable */
#define SCR_EL3_RES1 (3 << 4) /* Reserved, RES1 */
+#define SCR_EL3_EA_EN (1 << 3) /* External aborts taken to EL3 */
#define SCR_EL3_NS_EN (1 << 0) /* EL0 and EL1 in Non-scure state */
/*