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authorRick Chen <rick@andestech.com>2018-02-12 11:07:58 +0800
committerAndes <uboot@andestech.com>2018-03-30 13:13:22 +0800
commitbc0818a6a94429f2abd070afaa489266e78bf86b (patch)
tree57c3ffdabe89dcabf8b95e8f711b43febebcb3d2 /arch/riscv
parent81cf7c8d45935a295991fe2cd1df286f0f47511f (diff)
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riscv: checkpatch: Fix Macro argument reuse
It is CHECK reported by checkpatch.pl CHECK: Macro argument reuse 'PTE' - possible side-effects? Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com>
Diffstat (limited to 'arch/riscv')
-rw-r--r--arch/riscv/include/asm/encoding.h16
-rw-r--r--arch/riscv/include/asm/posix_types.h12
-rw-r--r--arch/riscv/include/asm/setup.h10
-rw-r--r--arch/riscv/include/asm/string.h12
4 files changed, 35 insertions, 15 deletions
diff --git a/arch/riscv/include/asm/encoding.h b/arch/riscv/include/asm/encoding.h
index 5ff6d59149..dbf8d45fb7 100644
--- a/arch/riscv/include/asm/encoding.h
+++ b/arch/riscv/include/asm/encoding.h
@@ -121,7 +121,9 @@
#define PTE_SW(PTE) ((0x88888880U >> ((PTE) & 0x1F)) & 1)
#define PTE_SX(PTE) ((0xA0A0A000U >> ((PTE) & 0x1F)) & 1)
-#define PTE_CHECK_PERM(PTE, SUPERVISOR, STORE, FETCH) \
+#define PTE_CHECK_PERM(_PTE, _SUPERVISOR, STORE, FETCH) \
+ typeof(_PTE) (PTE) = (_PTE); \
+ typeof(_SUPERVISOR) (SUPERVISOR) = (_SUPERVISOR); \
((STORE) ? ((SUPERVISOR) ? PTE_SW(PTE) : PTE_UW(PTE)) : \
(FETCH) ? ((SUPERVISOR) ? PTE_SX(PTE) : PTE_UX(PTE)) : \
((SUPERVISOR) ? PTE_SR(PTE) : PTE_UR(PTE)))
@@ -151,27 +153,31 @@
asm volatile ("csrr %0, " #reg : "=r"(__tmp)); \
__tmp; })
-#define write_csr(reg, val) ({ \
+#define write_csr(reg, _val) ({ \
+typeof(_val) (val) = (_val); \
if (__builtin_constant_p(val) && (unsigned long)(val) < 32) \
asm volatile ("csrw " #reg ", %0" :: "i"(val)); \
else \
asm volatile ("csrw " #reg ", %0" :: "r"(val)); })
-#define swap_csr(reg, val) ({ unsigned long __tmp; \
+#define swap_csr(reg, _val) ({ unsigned long __tmp; \
+typeof(_val) (val) = (_val); \
if (__builtin_constant_p(val) && (unsigned long)(val) < 32) \
asm volatile ("csrrw %0, " #reg ", %1" : "=r"(__tmp) : "i"(val)); \
else \
asm volatile ("csrrw %0, " #reg ", %1" : "=r"(__tmp) : "r"(val)); \
__tmp; })
-#define set_csr(reg, bit) ({ unsigned long __tmp; \
+#define set_csr(reg, _bit) ({ unsigned long __tmp; \
+typeof(_bit) (bit) = (_bit); \
if (__builtin_constant_p(bit) && (unsigned long)(bit) < 32) \
asm volatile ("csrrs %0, " #reg ", %1" : "=r"(__tmp) : "i"(bit)); \
else \
asm volatile ("csrrs %0, " #reg ", %1" : "=r"(__tmp) : "r"(bit)); \
__tmp; })
-#define clear_csr(reg, bit) ({ unsigned long __tmp; \
+#define clear_csr(reg, _bit) ({ unsigned long __tmp; \
+typeof(_bit) (bit) = (_bit); \
if (__builtin_constant_p(bit) && (unsigned long)(bit) < 32) \
asm volatile ("csrrc %0, " #reg ", %1" : "=r"(__tmp) : "i"(bit)); \
else \
diff --git a/arch/riscv/include/asm/posix_types.h b/arch/riscv/include/asm/posix_types.h
index 6892b66814..7438dbeb03 100644
--- a/arch/riscv/include/asm/posix_types.h
+++ b/arch/riscv/include/asm/posix_types.h
@@ -69,19 +69,23 @@ typedef struct {
#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2)
#undef __FD_SET
-#define __FD_SET(fd, fdsetp) \
+#define __FD_SET(_fd, fdsetp) \
+ typeof(_fd) (fd) = (_fd); \
(((fd_set *)fdsetp)->fds_bits[fd >> 5] |= (1 << (fd & 31)))
#undef __FD_CLR
-#define __FD_CLR(fd, fdsetp) \
+#define __FD_CLR(_fd, fdsetp) \
+ typeof(_fd) (fd) = (_fd); \
(((fd_set *)fdsetp)->fds_bits[fd >> 5] &= ~(1 << (fd & 31)))
#undef __FD_ISSET
-#define __FD_ISSET(fd, fdsetp) \
+#define __FD_ISSET(_fd, fdsetp) \
+ typeof(_fd) (fd) = (_fd); \
((((fd_set *)fdsetp)->fds_bits[fd >> 5] & (1 << (fd & 31))) != 0)
#undef __FD_ZERO
-#define __FD_ZERO(fdsetp) \
+#define __FD_ZERO(_fdsetp) \
+ typeof(_fdsetp) (fd) = (_fdsetp); \
(memset(fdsetp, 0, sizeof(*(fd_set *)fdsetp)))
#endif
diff --git a/arch/riscv/include/asm/setup.h b/arch/riscv/include/asm/setup.h
index 731b0d96aa..4b182432f1 100644
--- a/arch/riscv/include/asm/setup.h
+++ b/arch/riscv/include/asm/setup.h
@@ -145,14 +145,18 @@ struct tagtable {
int (*parse)(const struct tag *);
};
-#define tag_member_present(tag, member) \
+#define tag_member_present(_tag, member) \
+ typeof(_tag) (tag) = (_tag); \
((unsigned long)(&((struct tag *)0L)->member + 1) \
<= (tag)->hdr.size * 4)
-#define tag_next(t) ((struct tag *)((u32 *)(t) + (t)->hdr.size))
+#define tag_next(_t) \
+ typeof(_t) (t) = (_t); \
+ ((struct tag *)((u32 *)(t) + (t)->hdr.size))
#define tag_size(type) ((sizeof(struct tag_header) + sizeof(struct type)) >> 2)
-#define for_each_tag(t, base) \
+#define for_each_tag(_t, base) \
+ typeof(_t) (t) = (_t); \
for (t = base; t->hdr.size; t = tag_next(t))
#ifdef __KERNEL__
diff --git a/arch/riscv/include/asm/string.h b/arch/riscv/include/asm/string.h
index 038cdaea72..0fc3424a2f 100644
--- a/arch/riscv/include/asm/string.h
+++ b/arch/riscv/include/asm/string.h
@@ -26,8 +26,11 @@
#undef __HAVE_ARCH_MEMSET
#ifdef CONFIG_MARCO_MEMSET
-#define memset(p, v, n) \
- ({ \
+#define memset(_p, _v, _n) \
+ (typeof(_p) (p) = (_p); \
+ typeof(_v) (v) = (_v); \
+ typeof(_n) (n) = (_n); \
+ { \
if ((n) != 0) { \
if (__builtin_constant_p((v)) && (v) == 0) \
__memzero((p), (n)); \
@@ -37,7 +40,10 @@
(p); \
})
-#define memzero(p, n) ({ if ((n) != 0) __memzero((p), (n)); (p); })
+#define memzero(_p, _n) \
+ (typeof(_p) (p) = (_p); \
+ typeof(_n) (n) = (_n); \
+ { if ((n) != 0) __memzero((p), (n)); (p); })
#endif
#endif /* __ASM_RISCV_STRING_H */