global: Finish CONFIG -> CFG migration

At this point, the remaining places where we have a symbol that is
defined as CONFIG_... are in fairly odd locations. While as much dead
code has been removed as possible, some of these locations are simply
less obvious at first. In other cases, this code is used, but was
defined in such a way as to have been missed by earlier checks.  Perform
a rename of all such remaining symbols to be CFG_... rather than
CONFIG_...

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

16 files changed, 241 insertions, 241 deletions

diff --git a/arch/powerpc/cpu/mpc83xx/bats/bats.h b/arch/powerpc/cpu/mpc83xx/bats/bats.h
index f0754c2351..2629cd5eab 100644
--- a/arch/powerpc/cpu/mpc83xx/bats/bats.h
+++ b/arch/powerpc/cpu/mpc83xx/bats/bats.h
@@ -1,223 +1,223 @@
 #ifdef CONFIG_BAT0
-#define CONFIG_SYS_IBAT0L (\
+#define CFG_SYS_IBAT0L (\
 		(CONFIG_BAT0_BASE) |\
 		(CONFIG_BAT0_PAGE_PROTECTION) |\
 		(CONFIG_BAT0_WIMG_ICACHE) \
 		)
-#define CONFIG_SYS_IBAT0U (\
+#define CFG_SYS_IBAT0U (\
 		(CONFIG_BAT0_BASE) |\
 		(CONFIG_BAT0_LENGTH) |\
 		(CONFIG_BAT0_VALID_BITS) \
 		)
-#define CONFIG_SYS_DBAT0L (\
+#define CFG_SYS_DBAT0L (\
 		(CONFIG_BAT0_BASE) |\
 		(CONFIG_BAT0_PAGE_PROTECTION) |\
 		(CONFIG_BAT0_WIMG_DCACHE) \
 		)
-#define CONFIG_SYS_DBAT0U (\
+#define CFG_SYS_DBAT0U (\
 		(CONFIG_BAT0_BASE) |\
 		(CONFIG_BAT0_LENGTH) |\
 		(CONFIG_BAT0_VALID_BITS) \
 		)
 #else
-#define CONFIG_SYS_IBAT0L (0)
-#define CONFIG_SYS_IBAT0U (0)
-#define CONFIG_SYS_DBAT0L (0)
-#define CONFIG_SYS_DBAT0U (0)
+#define CFG_SYS_IBAT0L (0)
+#define CFG_SYS_IBAT0U (0)
+#define CFG_SYS_DBAT0L (0)
+#define CFG_SYS_DBAT0U (0)
 #endif /* CONFIG_BAT0 */
 
 #ifdef CONFIG_BAT1
-#define CONFIG_SYS_IBAT1L (\
+#define CFG_SYS_IBAT1L (\
 		(CONFIG_BAT1_BASE) |\
 		(CONFIG_BAT1_PAGE_PROTECTION) |\
 		(CONFIG_BAT1_WIMG_ICACHE) \
 		)
-#define CONFIG_SYS_IBAT1U (\
+#define CFG_SYS_IBAT1U (\
 		(CONFIG_BAT1_BASE) |\
 		(CONFIG_BAT1_LENGTH) |\
 		(CONFIG_BAT1_VALID_BITS) \
 		)
-#define CONFIG_SYS_DBAT1L (\
+#define CFG_SYS_DBAT1L (\
 		(CONFIG_BAT1_BASE) |\
 		(CONFIG_BAT1_PAGE_PROTECTION) |\
 		(CONFIG_BAT1_WIMG_DCACHE) \
 		)
-#define CONFIG_SYS_DBAT1U (\
+#define CFG_SYS_DBAT1U (\
 		(CONFIG_BAT1_BASE) |\
 		(CONFIG_BAT1_LENGTH) |\
 		(CONFIG_BAT1_VALID_BITS) \
 		)
 #else
-#define CONFIG_SYS_IBAT1L (0)
-#define CONFIG_SYS_IBAT1U (0)
-#define CONFIG_SYS_DBAT1L (0)
-#define CONFIG_SYS_DBAT1U (0)
+#define CFG_SYS_IBAT1L (0)
+#define CFG_SYS_IBAT1U (0)
+#define CFG_SYS_DBAT1L (0)
+#define CFG_SYS_DBAT1U (0)
 #endif /* CONFIG_BAT1 */
 
 #ifdef CONFIG_BAT2
-#define CONFIG_SYS_IBAT2L (\
+#define CFG_SYS_IBAT2L (\
 		(CONFIG_BAT2_BASE) |\
 		(CONFIG_BAT2_PAGE_PROTECTION) |\
 		(CONFIG_BAT2_WIMG_ICACHE) \
 		)
-#define CONFIG_SYS_IBAT2U (\
+#define CFG_SYS_IBAT2U (\
 		(CONFIG_BAT2_BASE) |\
 		(CONFIG_BAT2_LENGTH) |\
 		(CONFIG_BAT2_VALID_BITS) \
 		)
-#define CONFIG_SYS_DBAT2L (\
+#define CFG_SYS_DBAT2L (\
 		(CONFIG_BAT2_BASE) |\
 		(CONFIG_BAT2_PAGE_PROTECTION) |\
 		(CONFIG_BAT2_WIMG_DCACHE) \
 		)
-#define CONFIG_SYS_DBAT2U (\
+#define CFG_SYS_DBAT2U (\
 		(CONFIG_BAT2_BASE) |\
 		(CONFIG_BAT2_LENGTH) |\
 		(CONFIG_BAT2_VALID_BITS) \
 		)
 #else
-#define CONFIG_SYS_IBAT2L (0)
-#define CONFIG_SYS_IBAT2U (0)
-#define CONFIG_SYS_DBAT2L (0)
-#define CONFIG_SYS_DBAT2U (0)
+#define CFG_SYS_IBAT2L (0)
+#define CFG_SYS_IBAT2U (0)
+#define CFG_SYS_DBAT2L (0)
+#define CFG_SYS_DBAT2U (0)
 #endif /* CONFIG_BAT2 */
 
 #ifdef CONFIG_BAT3
-#define CONFIG_SYS_IBAT3L (\
+#define CFG_SYS_IBAT3L (\
 		(CONFIG_BAT3_BASE) |\
 		(CONFIG_BAT3_PAGE_PROTECTION) |\
 		(CONFIG_BAT3_WIMG_ICACHE) \
 		)
-#define CONFIG_SYS_IBAT3U (\
+#define CFG_SYS_IBAT3U (\
 		(CONFIG_BAT3_BASE) |\
 		(CONFIG_BAT3_LENGTH) |\
 		(CONFIG_BAT3_VALID_BITS) \
 		)
-#define CONFIG_SYS_DBAT3L (\
+#define CFG_SYS_DBAT3L (\
 		(CONFIG_BAT3_BASE) |\
 		(CONFIG_BAT3_PAGE_PROTECTION) |\
 		(CONFIG_BAT3_WIMG_DCACHE) \
 		)
-#define CONFIG_SYS_DBAT3U (\
+#define CFG_SYS_DBAT3U (\
 		(CONFIG_BAT3_BASE) |\
 		(CONFIG_BAT3_LENGTH) |\
 		(CONFIG_BAT3_VALID_BITS) \
 		)
 #else
-#define CONFIG_SYS_IBAT3L (0)
-#define CONFIG_SYS_IBAT3U (0)
-#define CONFIG_SYS_DBAT3L (0)
-#define CONFIG_SYS_DBAT3U (0)
+#define CFG_SYS_IBAT3L (0)
+#define CFG_SYS_IBAT3U (0)
+#define CFG_SYS_DBAT3L (0)
+#define CFG_SYS_DBAT3U (0)
 #endif /* CONFIG_BAT3 */
 
 #ifdef CONFIG_BAT4
-#define CONFIG_SYS_IBAT4L (\
+#define CFG_SYS_IBAT4L (\
 		(CONFIG_BAT4_BASE) |\
 		(CONFIG_BAT4_PAGE_PROTECTION) |\
 		(CONFIG_BAT4_WIMG_ICACHE) \
 		)
-#define CONFIG_SYS_IBAT4U (\
+#define CFG_SYS_IBAT4U (\
 		(CONFIG_BAT4_BASE) |\
 		(CONFIG_BAT4_LENGTH) |\
 		(CONFIG_BAT4_VALID_BITS) \
 		)
-#define CONFIG_SYS_DBAT4L (\
+#define CFG_SYS_DBAT4L (\
 		(CONFIG_BAT4_BASE) |\
 		(CONFIG_BAT4_PAGE_PROTECTION) |\
 		(CONFIG_BAT4_WIMG_DCACHE) \
 		)
-#define CONFIG_SYS_DBAT4U (\
+#define CFG_SYS_DBAT4U (\
 		(CONFIG_BAT4_BASE) |\
 		(CONFIG_BAT4_LENGTH) |\
 		(CONFIG_BAT4_VALID_BITS) \
 		)
 #else
-#define CONFIG_SYS_IBAT4L (0)
-#define CONFIG_SYS_IBAT4U (0)
-#define CONFIG_SYS_DBAT4L (0)
-#define CONFIG_SYS_DBAT4U (0)
+#define CFG_SYS_IBAT4L (0)
+#define CFG_SYS_IBAT4U (0)
+#define CFG_SYS_DBAT4L (0)
+#define CFG_SYS_DBAT4U (0)
 #endif /* CONFIG_BAT4 */
 
 #ifdef CONFIG_BAT5
-#define CONFIG_SYS_IBAT5L (\
+#define CFG_SYS_IBAT5L (\
 		(CONFIG_BAT5_BASE) |\
 		(CONFIG_BAT5_PAGE_PROTECTION) |\
 		(CONFIG_BAT5_WIMG_ICACHE) \
 		)
-#define CONFIG_SYS_IBAT5U (\
+#define CFG_SYS_IBAT5U (\
 		(CONFIG_BAT5_BASE) |\
 		(CONFIG_BAT5_LENGTH) |\
 		(CONFIG_BAT5_VALID_BITS) \
 		)
-#define CONFIG_SYS_DBAT5L (\
+#define CFG_SYS_DBAT5L (\
 		(CONFIG_BAT5_BASE) |\
 		(CONFIG_BAT5_PAGE_PROTECTION) |\
 		(CONFIG_BAT5_WIMG_DCACHE) \
 		)
-#define CONFIG_SYS_DBAT5U (\
+#define CFG_SYS_DBAT5U (\
 		(CONFIG_BAT5_BASE) |\
 		(CONFIG_BAT5_LENGTH) |\
 		(CONFIG_BAT5_VALID_BITS) \
 		)
 #else
-#define CONFIG_SYS_IBAT5L (0)
-#define CONFIG_SYS_IBAT5U (0)
-#define CONFIG_SYS_DBAT5L (0)
-#define CONFIG_SYS_DBAT5U (0)
+#define CFG_SYS_IBAT5L (0)
+#define CFG_SYS_IBAT5U (0)
+#define CFG_SYS_DBAT5L (0)
+#define CFG_SYS_DBAT5U (0)
 #endif /* CONFIG_BAT5 */
 
 #ifdef CONFIG_BAT6
-#define CONFIG_SYS_IBAT6L (\
+#define CFG_SYS_IBAT6L (\
 		(CONFIG_BAT6_BASE) |\
 		(CONFIG_BAT6_PAGE_PROTECTION) |\
 		(CONFIG_BAT6_WIMG_ICACHE) \
 		)
-#define CONFIG_SYS_IBAT6U (\
+#define CFG_SYS_IBAT6U (\
 		(CONFIG_BAT6_BASE) |\
 		(CONFIG_BAT6_LENGTH) |\
 		(CONFIG_BAT6_VALID_BITS) \
 		)
-#define CONFIG_SYS_DBAT6L (\
+#define CFG_SYS_DBAT6L (\
 		(CONFIG_BAT6_BASE) |\
 		(CONFIG_BAT6_PAGE_PROTECTION) |\
 		(CONFIG_BAT6_WIMG_DCACHE) \
 		)
-#define CONFIG_SYS_DBAT6U (\
+#define CFG_SYS_DBAT6U (\
 		(CONFIG_BAT6_BASE) |\
 		(CONFIG_BAT6_LENGTH) |\
 		(CONFIG_BAT6_VALID_BITS) \
 		)
 #else
-#define CONFIG_SYS_IBAT6L (0)
-#define CONFIG_SYS_IBAT6U (0)
-#define CONFIG_SYS_DBAT6L (0)
-#define CONFIG_SYS_DBAT6U (0)
+#define CFG_SYS_IBAT6L (0)
+#define CFG_SYS_IBAT6U (0)
+#define CFG_SYS_DBAT6L (0)
+#define CFG_SYS_DBAT6U (0)
 #endif /* CONFIG_BAT6 */
 
 #ifdef CONFIG_BAT7
-#define CONFIG_SYS_IBAT7L (\
+#define CFG_SYS_IBAT7L (\
 		(CONFIG_BAT7_BASE) |\
 		(CONFIG_BAT7_PAGE_PROTECTION) |\
 		(CONFIG_BAT7_WIMG_ICACHE) \
 		)
-#define CONFIG_SYS_IBAT7U (\
+#define CFG_SYS_IBAT7U (\
 		(CONFIG_BAT7_BASE) |\
 		(CONFIG_BAT7_LENGTH) |\
 		(CONFIG_BAT7_VALID_BITS) \
 		)
-#define CONFIG_SYS_DBAT7L (\
+#define CFG_SYS_DBAT7L (\
 		(CONFIG_BAT7_BASE) |\
 		(CONFIG_BAT7_PAGE_PROTECTION) |\
 		(CONFIG_BAT7_WIMG_DCACHE) \
 		)
-#define CONFIG_SYS_DBAT7U (\
+#define CFG_SYS_DBAT7U (\
 		(CONFIG_BAT7_BASE) |\
 		(CONFIG_BAT7_LENGTH) |\
 		(CONFIG_BAT7_VALID_BITS) \
 		)
 #else
-#define CONFIG_SYS_IBAT7L (0)
-#define CONFIG_SYS_IBAT7U (0)
-#define CONFIG_SYS_DBAT7L (0)
-#define CONFIG_SYS_DBAT7U (0)
+#define CFG_SYS_IBAT7L (0)
+#define CFG_SYS_IBAT7U (0)
+#define CFG_SYS_DBAT7L (0)
+#define CFG_SYS_DBAT7U (0)
 #endif /* CONFIG_BAT7 */
diff --git a/arch/powerpc/cpu/mpc83xx/cpu_init.c b/arch/powerpc/cpu/mpc83xx/cpu_init.c
index 63c2729411..2af5c89ae5 100644
--- a/arch/powerpc/cpu/mpc83xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc83xx/cpu_init.c
@@ -208,24 +208,24 @@ void cpu_init_f (volatile immap_t * im)
 	init_early_memctl_regs();
 
 	/* Local Access window setup */
-#if defined(CONFIG_SYS_LBLAWBAR0_PRELIM) && defined(CONFIG_SYS_LBLAWAR0_PRELIM)
-	im->sysconf.lblaw[0].bar = CONFIG_SYS_LBLAWBAR0_PRELIM;
-	im->sysconf.lblaw[0].ar = CONFIG_SYS_LBLAWAR0_PRELIM;
+#if defined(CFG_SYS_LBLAWBAR0_PRELIM) && defined(CFG_SYS_LBLAWAR0_PRELIM)
+	im->sysconf.lblaw[0].bar = CFG_SYS_LBLAWBAR0_PRELIM;
+	im->sysconf.lblaw[0].ar = CFG_SYS_LBLAWAR0_PRELIM;
 #else
-#error	CONFIG_SYS_LBLAWBAR0_PRELIM & CONFIG_SYS_LBLAWAR0_PRELIM must be defined
+#error	CFG_SYS_LBLAWBAR0_PRELIM & CFG_SYS_LBLAWAR0_PRELIM must be defined
 #endif
 
-#if defined(CONFIG_SYS_LBLAWBAR1_PRELIM) && defined(CONFIG_SYS_LBLAWAR1_PRELIM)
-	im->sysconf.lblaw[1].bar = CONFIG_SYS_LBLAWBAR1_PRELIM;
-	im->sysconf.lblaw[1].ar = CONFIG_SYS_LBLAWAR1_PRELIM;
+#if defined(CFG_SYS_LBLAWBAR1_PRELIM) && defined(CFG_SYS_LBLAWAR1_PRELIM)
+	im->sysconf.lblaw[1].bar = CFG_SYS_LBLAWBAR1_PRELIM;
+	im->sysconf.lblaw[1].ar = CFG_SYS_LBLAWAR1_PRELIM;
 #endif
-#if defined(CONFIG_SYS_LBLAWBAR2_PRELIM) && defined(CONFIG_SYS_LBLAWAR2_PRELIM)
-	im->sysconf.lblaw[2].bar = CONFIG_SYS_LBLAWBAR2_PRELIM;
-	im->sysconf.lblaw[2].ar = CONFIG_SYS_LBLAWAR2_PRELIM;
+#if defined(CFG_SYS_LBLAWBAR2_PRELIM) && defined(CFG_SYS_LBLAWAR2_PRELIM)
+	im->sysconf.lblaw[2].bar = CFG_SYS_LBLAWBAR2_PRELIM;
+	im->sysconf.lblaw[2].ar = CFG_SYS_LBLAWAR2_PRELIM;
 #endif
-#if defined(CONFIG_SYS_LBLAWBAR3_PRELIM) && defined(CONFIG_SYS_LBLAWAR3_PRELIM)
-	im->sysconf.lblaw[3].bar = CONFIG_SYS_LBLAWBAR3_PRELIM;
-	im->sysconf.lblaw[3].ar = CONFIG_SYS_LBLAWAR3_PRELIM;
+#if defined(CFG_SYS_LBLAWBAR3_PRELIM) && defined(CFG_SYS_LBLAWAR3_PRELIM)
+	im->sysconf.lblaw[3].bar = CFG_SYS_LBLAWBAR3_PRELIM;
+	im->sysconf.lblaw[3].ar = CFG_SYS_LBLAWAR3_PRELIM;
 #endif
 #if defined(CONFIG_SYS_LBLAWBAR4_PRELIM) && defined(CONFIG_SYS_LBLAWAR4_PRELIM)
 	im->sysconf.lblaw[4].bar = CONFIG_SYS_LBLAWBAR4_PRELIM;
diff --git a/arch/powerpc/cpu/mpc83xx/hid/hid.h b/arch/powerpc/cpu/mpc83xx/hid/hid.h
index 9f5260c012..089d1d77f0 100644
--- a/arch/powerpc/cpu/mpc83xx/hid/hid.h
+++ b/arch/powerpc/cpu/mpc83xx/hid/hid.h
@@ -1,4 +1,4 @@
-#define CONFIG_SYS_HID0_FINAL ( \
+#define CFG_SYS_HID0_FINAL ( \
 	CONFIG_HID0_FINAL_ABE_BIT |\
 	CONFIG_HID0_FINAL_CLKOUT |\
 	CONFIG_HID0_FINAL_DCE_BIT |\
@@ -24,7 +24,7 @@
 	CONFIG_HID0_FINAL_SLEEP_BIT \
 )
 
-#define CONFIG_SYS_HID0_INIT ( \
+#define CFG_SYS_HID0_INIT ( \
 	CONFIG_HID0_INIT_ABE_BIT |\
 	CONFIG_HID0_INIT_CLKOUT |\
 	CONFIG_HID0_INIT_DCE_BIT |\
@@ -50,12 +50,12 @@
 
 #ifdef CONFIG_TARGET_IDS8313
 /* IDS8313 defines a reserved bit; keep to not break compatibility */
-#define CONFIG_HID2_SPECIAL 0x00020000
+#define CFG_HID2_SPECIAL 0x00020000
 #else
-#define CONFIG_HID2_SPECIAL 0x0
+#define CFG_HID2_SPECIAL 0x0
 #endif
 
-#define CONFIG_SYS_HID2 ( \
+#define CFG_SYS_HID2 ( \
 	CONFIG_HID2_LET_BIT |\
 	CONFIG_HID2_IFEB_BIT |\
 	CONFIG_HID2_MESISTATE_BIT |\
@@ -68,5 +68,5 @@
 	CONFIG_HID2_IWLCK |\
 	CONFIG_HID2_ICWP_BIT |\
 	CONFIG_HID2_DWLCK |\
-	CONFIG_HID2_SPECIAL \
+	CFG_HID2_SPECIAL \
 )
diff --git a/arch/powerpc/cpu/mpc83xx/hrcw/hrcw.h b/arch/powerpc/cpu/mpc83xx/hrcw/hrcw.h
index 0f34267891..7f8787ffb0 100644
--- a/arch/powerpc/cpu/mpc83xx/hrcw/hrcw.h
+++ b/arch/powerpc/cpu/mpc83xx/hrcw/hrcw.h
@@ -1,4 +1,4 @@
-#define CONFIG_SYS_HRCW_LOW (\
+#define CFG_SYS_HRCW_LOW (\
 	(CONFIG_LBMC_CLOCK_MODE << (31 - 0)) |\
 	(CONFIG_DDR_MC_CLOCK_MODE << (31 - 1)) |\
 	(CONFIG_SYSTEM_PLL_VCO_DIV << (31 - 3)) |\
@@ -9,7 +9,7 @@
 	(CONFIG_QUICC_MULT_FACTOR << (31 - 31)) \
 	)
 
-#define CONFIG_SYS_HRCW_HIGH (\
+#define CFG_SYS_HRCW_HIGH (\
 	(CONFIG_PCI_HOST_MODE << (31 - 0)) |\
 	(CONFIG_PCI_64BIT_MODE << (31 - 1)) |\
 	(CONFIG_PCI_INT_ARBITER1 << (31 - 2)) |\
diff --git a/arch/powerpc/cpu/mpc83xx/lblaw/lblaw.h b/arch/powerpc/cpu/mpc83xx/lblaw/lblaw.h
index 6972afcc2c..082b2b9c9a 100644
--- a/arch/powerpc/cpu/mpc83xx/lblaw/lblaw.h
+++ b/arch/powerpc/cpu/mpc83xx/lblaw/lblaw.h
@@ -1,55 +1,55 @@
 #if defined(CONFIG_LBLAW0)
-#define CONFIG_SYS_LBLAWBAR0_PRELIM \
+#define CFG_SYS_LBLAWBAR0_PRELIM \
 	CONFIG_LBLAW0_BASE
-#define CONFIG_SYS_LBLAWAR0_PRELIM (\
+#define CFG_SYS_LBLAWAR0_PRELIM (\
 	CONFIG_LBLAW0_ENABLE_BIT |\
 	CONFIG_LBLAW0_LENGTH \
 )
 #endif
 
 #if defined(CONFIG_LBLAW1)
-#define CONFIG_SYS_LBLAWBAR1_PRELIM \
+#define CFG_SYS_LBLAWBAR1_PRELIM \
 	CONFIG_LBLAW1_BASE
-#define CONFIG_SYS_LBLAWAR1_PRELIM (\
+#define CFG_SYS_LBLAWAR1_PRELIM (\
 	CONFIG_LBLAW1_ENABLE_BIT |\
 	CONFIG_LBLAW1_LENGTH \
 )
 #endif
 
 #if defined(CONFIG_LBLAW2)
-#define CONFIG_SYS_LBLAWBAR2_PRELIM \
+#define CFG_SYS_LBLAWBAR2_PRELIM \
 	CONFIG_LBLAW2_BASE
-#define CONFIG_SYS_LBLAWAR2_PRELIM (\
+#define CFG_SYS_LBLAWAR2_PRELIM (\
 	CONFIG_LBLAW2_ENABLE_BIT |\
 	CONFIG_LBLAW2_LENGTH \
 )
 #endif
 
 #if defined(CONFIG_LBLAW3)
-#define CONFIG_SYS_LBLAWBAR3_PRELIM \
+#define CFG_SYS_LBLAWBAR3_PRELIM \
 	CONFIG_LBLAW3_BASE
-#define CONFIG_SYS_LBLAWAR3_PRELIM (\
+#define CFG_SYS_LBLAWAR3_PRELIM (\
 	CONFIG_LBLAW3_ENABLE_BIT |\
 	CONFIG_LBLAW3_LENGTH \
 )
 #endif
 
 #ifdef CONFIG_NAND_LBLAWBAR_PRELIM_0
-#define CONFIG_SYS_NAND_LBLAWBAR_PRELIM CONFIG_SYS_LBLAWBAR0_PRELIM
-#define CONFIG_SYS_NAND_LBLAWAR_PRELIM CONFIG_SYS_LBLAWAR0_PRELIM
+#define CFG_SYS_NAND_LBLAWBAR_PRELIM CFG_SYS_LBLAWBAR0_PRELIM
+#define CFG_SYS_NAND_LBLAWAR_PRELIM CFG_SYS_LBLAWAR0_PRELIM
 #endif
 
 #ifdef CONFIG_NAND_LBLAWBAR_PRELIM_1
-#define CONFIG_SYS_NAND_LBLAWBAR_PRELIM CONFIG_SYS_LBLAWBAR1_PRELIM
-#define CONFIG_SYS_NAND_LBLAWAR_PRELIM CONFIG_SYS_LBLAWAR1_PRELIM
+#define CFG_SYS_NAND_LBLAWBAR_PRELIM CFG_SYS_LBLAWBAR1_PRELIM
+#define CFG_SYS_NAND_LBLAWAR_PRELIM CFG_SYS_LBLAWAR1_PRELIM
 #endif
 
 #ifdef CONFIG_NAND_LBLAWBAR_PRELIM_2
-#define CONFIG_SYS_NAND_LBLAWBAR_PRELIM CONFIG_SYS_LBLAWBAR2_PRELIM
-#define CONFIG_SYS_NAND_LBLAWAR_PRELIM CONFIG_SYS_LBLAWAR2_PRELIM
+#define CFG_SYS_NAND_LBLAWBAR_PRELIM CFG_SYS_LBLAWBAR2_PRELIM
+#define CFG_SYS_NAND_LBLAWAR_PRELIM CFG_SYS_LBLAWAR2_PRELIM
 #endif
 
 #ifdef CONFIG_NAND_LBLAWBAR_PRELIM_3
-#define CONFIG_SYS_NAND_LBLAWBAR_PRELIM CONFIG_SYS_LBLAWBAR3_PRELIM
-#define CONFIG_SYS_NAND_LBLAWAR_PRELIM CONFIG_SYS_LBLAWAR3_PRELIM
+#define CFG_SYS_NAND_LBLAWBAR_PRELIM CFG_SYS_LBLAWBAR3_PRELIM
+#define CFG_SYS_NAND_LBLAWAR_PRELIM CFG_SYS_LBLAWAR3_PRELIM
 #endif
diff --git a/arch/powerpc/cpu/mpc83xx/spd_sdram.c b/arch/powerpc/cpu/mpc83xx/spd_sdram.c
index 4f982b8303..6da8fc4381 100644
--- a/arch/powerpc/cpu/mpc83xx/spd_sdram.c
+++ b/arch/powerpc/cpu/mpc83xx/spd_sdram.c
@@ -66,8 +66,8 @@ void board_add_ram_info(int use_default)
 }
 
 #ifdef CONFIG_SPD_EEPROM
-#ifndef	CONFIG_SYS_READ_SPD
-#define CONFIG_SYS_READ_SPD	i2c_read
+#ifndef	CFG_SYS_READ_SPD
+#define CFG_SYS_READ_SPD	i2c_read
 #endif
 #ifndef SPD_EEPROM_OFFSET
 #define SPD_EEPROM_OFFSET	0
@@ -167,7 +167,7 @@ long int spd_sdram()
 	isync();
 
 	/* Read SPD parameters with I2C */
-	CONFIG_SYS_READ_SPD(SPD_EEPROM_ADDRESS, SPD_EEPROM_OFFSET,
+	CFG_SYS_READ_SPD(SPD_EEPROM_ADDRESS, SPD_EEPROM_OFFSET,
 		SPD_EEPROM_ADDR_LEN, (uchar *) &spd, sizeof(spd));
 #ifdef SPD_DEBUG
 	spd_debug(&spd);
diff --git a/arch/powerpc/cpu/mpc83xx/spl_minimal.c b/arch/powerpc/cpu/mpc83xx/spl_minimal.c
index 7cc0383afb..b55bfaffca 100644
--- a/arch/powerpc/cpu/mpc83xx/spl_minimal.c
+++ b/arch/powerpc/cpu/mpc83xx/spl_minimal.c
@@ -73,14 +73,14 @@ void cpu_init_f (volatile immap_t * im)
 
 #if defined(CFG_SYS_NAND_BR_PRELIM)  \
 	&& defined(CFG_SYS_NAND_OR_PRELIM) \
-	&& defined(CONFIG_SYS_NAND_LBLAWBAR_PRELIM) \
-	&& defined(CONFIG_SYS_NAND_LBLAWAR_PRELIM)
+	&& defined(CFG_SYS_NAND_LBLAWBAR_PRELIM) \
+	&& defined(CFG_SYS_NAND_LBLAWAR_PRELIM)
 	set_lbc_br(0, CFG_SYS_NAND_BR_PRELIM);
 	set_lbc_or(0, CFG_SYS_NAND_OR_PRELIM);
-	im->sysconf.lblaw[0].bar = CONFIG_SYS_NAND_LBLAWBAR_PRELIM;
-	im->sysconf.lblaw[0].ar = CONFIG_SYS_NAND_LBLAWAR_PRELIM;
+	im->sysconf.lblaw[0].bar = CFG_SYS_NAND_LBLAWBAR_PRELIM;
+	im->sysconf.lblaw[0].ar = CFG_SYS_NAND_LBLAWAR_PRELIM;
 #else
-#error CFG_SYS_NAND_BR_PRELIM, CFG_SYS_NAND_OR_PRELIM, CONFIG_SYS_NAND_LBLAWBAR_PRELIM & CONFIG_SYS_NAND_LBLAWAR_PRELIM must be defined
+#error CFG_SYS_NAND_BR_PRELIM, CFG_SYS_NAND_OR_PRELIM, CFG_SYS_NAND_LBLAWBAR_PRELIM & CFG_SYS_NAND_LBLAWAR_PRELIM must be defined
 #endif
 }
 
diff --git a/arch/powerpc/cpu/mpc83xx/start.S b/arch/powerpc/cpu/mpc83xx/start.S
index 52326f0ec1..e3878e431f 100644
--- a/arch/powerpc/cpu/mpc83xx/start.S
+++ b/arch/powerpc/cpu/mpc83xx/start.S
@@ -46,7 +46,7 @@
 
 #if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_NAND_SPL) && \
 	!defined(CONFIG_SYS_RAMBOOT)
-#define CONFIG_SYS_FLASHBOOT
+#define CFG_SYS_FLASHBOOT
 #endif
 
 /*
@@ -81,8 +81,8 @@
 	.fill	8,1,(((w)>> 8)&0xff);	\
 	.fill	8,1,(((w)    )&0xff)
 
-	_HRCW_TABLE_ENTRY(CONFIG_SYS_HRCW_LOW)
-	_HRCW_TABLE_ENTRY(CONFIG_SYS_HRCW_HIGH)
+	_HRCW_TABLE_ENTRY(CFG_SYS_HRCW_LOW)
+	_HRCW_TABLE_ENTRY(CFG_SYS_HRCW_HIGH)
 
 /*
  * Magic number and version string - put it after the HRCW since it
@@ -180,7 +180,7 @@ _start: /* time t 0 */
 
 	bl	init_e300_core
 
-#ifdef CONFIG_SYS_FLASHBOOT
+#ifdef CFG_SYS_FLASHBOOT
 
 	/* Inflate flash location so it appears everywhere, calculate */
 	/* the absolute address in final location of the FLASH, jump  */
@@ -196,7 +196,7 @@ in_flash:
 #if 1 /* Remapping flash with LAW0. */
 	bl remap_flash_by_law0
 #endif
-#endif	/* CONFIG_SYS_FLASHBOOT */
+#endif	/* CFG_SYS_FLASHBOOT */
 
 	/* setup the bats */
 	bl	setup_bats
@@ -525,18 +525,18 @@ init_e300_core: /* time t 10 */
 	/* - force invalidation of data and instruction caches  */
 	/*------------------------------------------------------*/
 
-	lis	r3, CONFIG_SYS_HID0_INIT@h
-	ori	r3, r3, (CONFIG_SYS_HID0_INIT | HID0_ICFI | HID0_DCFI)@l
+	lis	r3, CFG_SYS_HID0_INIT@h
+	ori	r3, r3, (CFG_SYS_HID0_INIT | HID0_ICFI | HID0_DCFI)@l
 	SYNC
 	mtspr	HID0, r3
 
-	lis	r3, CONFIG_SYS_HID0_FINAL@h
-	ori	r3, r3, (CONFIG_SYS_HID0_FINAL & ~(HID0_ICFI | HID0_DCFI))@l
+	lis	r3, CFG_SYS_HID0_FINAL@h
+	ori	r3, r3, (CFG_SYS_HID0_FINAL & ~(HID0_ICFI | HID0_DCFI))@l
 	SYNC
 	mtspr	HID0, r3
 
-	lis	r3, CONFIG_SYS_HID2@h
-	ori	r3, r3, CONFIG_SYS_HID2@l
+	lis	r3, CFG_SYS_HID2@h
+	ori	r3, r3, CFG_SYS_HID2@l
 	SYNC
 	mtspr	HID2, r3
 
@@ -550,131 +550,131 @@ setup_bats:
 	addis	r0, r0, 0x0000
 
 	/* IBAT 0 */
-	addis	r4, r0, CONFIG_SYS_IBAT0L@h
-	ori	r4, r4, CONFIG_SYS_IBAT0L@l
-	addis	r3, r0, CONFIG_SYS_IBAT0U@h
-	ori	r3, r3, CONFIG_SYS_IBAT0U@l
+	addis	r4, r0, CFG_SYS_IBAT0L@h
+	ori	r4, r4, CFG_SYS_IBAT0L@l
+	addis	r3, r0, CFG_SYS_IBAT0U@h
+	ori	r3, r3, CFG_SYS_IBAT0U@l
 	mtspr	IBAT0L, r4
 	mtspr	IBAT0U, r3
 
 	/* DBAT 0 */
-	addis	r4, r0, CONFIG_SYS_DBAT0L@h
-	ori	r4, r4, CONFIG_SYS_DBAT0L@l
-	addis	r3, r0, CONFIG_SYS_DBAT0U@h
-	ori	r3, r3, CONFIG_SYS_DBAT0U@l
+	addis	r4, r0, CFG_SYS_DBAT0L@h
+	ori	r4, r4, CFG_SYS_DBAT0L@l
+	addis	r3, r0, CFG_SYS_DBAT0U@h
+	ori	r3, r3, CFG_SYS_DBAT0U@l
 	mtspr	DBAT0L, r4
 	mtspr	DBAT0U, r3
 
 	/* IBAT 1 */
-	addis	r4, r0, CONFIG_SYS_IBAT1L@h
-	ori	r4, r4, CONFIG_SYS_IBAT1L@l
-	addis	r3, r0, CONFIG_SYS_IBAT1U@h
-	ori	r3, r3, CONFIG_SYS_IBAT1U@l
+	addis	r4, r0, CFG_SYS_IBAT1L@h
+	ori	r4, r4, CFG_SYS_IBAT1L@l
+	addis	r3, r0, CFG_SYS_IBAT1U@h
+	ori	r3, r3, CFG_SYS_IBAT1U@l
 	mtspr	IBAT1L, r4
 	mtspr	IBAT1U, r3
 
 	/* DBAT 1 */
-	addis	r4, r0, CONFIG_SYS_DBAT1L@h
-	ori	r4, r4, CONFIG_SYS_DBAT1L@l
-	addis	r3, r0, CONFIG_SYS_DBAT1U@h
-	ori	r3, r3, CONFIG_SYS_DBAT1U@l
+	addis	r4, r0, CFG_SYS_DBAT1L@h
+	ori	r4, r4, CFG_SYS_DBAT1L@l
+	addis	r3, r0, CFG_SYS_DBAT1U@h
+	ori	r3, r3, CFG_SYS_DBAT1U@l
 	mtspr	DBAT1L, r4
 	mtspr	DBAT1U, r3
 
 	/* IBAT 2 */
-	addis	r4, r0, CONFIG_SYS_IBAT2L@h
-	ori	r4, r4, CONFIG_SYS_IBAT2L@l
-	addis	r3, r0, CONFIG_SYS_IBAT2U@h
-	ori	r3, r3, CONFIG_SYS_IBAT2U@l
+	addis	r4, r0, CFG_SYS_IBAT2L@h
+	ori	r4, r4, CFG_SYS_IBAT2L@l
+	addis	r3, r0, CFG_SYS_IBAT2U@h
+	ori	r3, r3, CFG_SYS_IBAT2U@l
 	mtspr	IBAT2L, r4
 	mtspr	IBAT2U, r3
 
 	/* DBAT 2 */
-	addis	r4, r0, CONFIG_SYS_DBAT2L@h
-	ori	r4, r4, CONFIG_SYS_DBAT2L@l
-	addis	r3, r0, CONFIG_SYS_DBAT2U@h
-	ori	r3, r3, CONFIG_SYS_DBAT2U@l
+	addis	r4, r0, CFG_SYS_DBAT2L@h
+	ori	r4, r4, CFG_SYS_DBAT2L@l
+	addis	r3, r0, CFG_SYS_DBAT2U@h
+	ori	r3, r3, CFG_SYS_DBAT2U@l
 	mtspr	DBAT2L, r4
 	mtspr	DBAT2U, r3
 
 	/* IBAT 3 */
-	addis	r4, r0, CONFIG_SYS_IBAT3L@h
-	ori	r4, r4, CONFIG_SYS_IBAT3L@l
-	addis	r3, r0, CONFIG_SYS_IBAT3U@h
-	ori	r3, r3, CONFIG_SYS_IBAT3U@l
+	addis	r4, r0, CFG_SYS_IBAT3L@h
+	ori	r4, r4, CFG_SYS_IBAT3L@l
+	addis	r3, r0, CFG_SYS_IBAT3U@h
+	ori	r3, r3, CFG_SYS_IBAT3U@l
 	mtspr	IBAT3L, r4
 	mtspr	IBAT3U, r3
 
 	/* DBAT 3 */
-	addis	r4, r0, CONFIG_SYS_DBAT3L@h
-	ori	r4, r4, CONFIG_SYS_DBAT3L@l
-	addis	r3, r0, CONFIG_SYS_DBAT3U@h
-	ori	r3, r3, CONFIG_SYS_DBAT3U@l
+	addis	r4, r0, CFG_SYS_DBAT3L@h
+	ori	r4, r4, CFG_SYS_DBAT3L@l
+	addis	r3, r0, CFG_SYS_DBAT3U@h
+	ori	r3, r3, CFG_SYS_DBAT3U@l
 	mtspr	DBAT3L, r4
 	mtspr	DBAT3U, r3
 
 #ifdef CONFIG_HIGH_BATS
 	/* IBAT 4 */
-	addis   r4, r0, CONFIG_SYS_IBAT4L@h
-	ori     r4, r4, CONFIG_SYS_IBAT4L@l
-	addis   r3, r0, CONFIG_SYS_IBAT4U@h
-	ori     r3, r3, CONFIG_SYS_IBAT4U@l
+	addis   r4, r0, CFG_SYS_IBAT4L@h
+	ori     r4, r4, CFG_SYS_IBAT4L@l
+	addis   r3, r0, CFG_SYS_IBAT4U@h
+	ori     r3, r3, CFG_SYS_IBAT4U@l
 	mtspr   IBAT4L, r4
 	mtspr   IBAT4U, r3
 
 	/* DBAT 4 */
-	addis   r4, r0, CONFIG_SYS_DBAT4L@h
-	ori     r4, r4, CONFIG_SYS_DBAT4L@l
-	addis   r3, r0, CONFIG_SYS_DBAT4U@h
-	ori     r3, r3, CONFIG_SYS_DBAT4U@l
+	addis   r4, r0, CFG_SYS_DBAT4L@h
+	ori     r4, r4, CFG_SYS_DBAT4L@l
+	addis   r3, r0, CFG_SYS_DBAT4U@h
+	ori     r3, r3, CFG_SYS_DBAT4U@l
 	mtspr   DBAT4L, r4
 	mtspr   DBAT4U, r3
 
 	/* IBAT 5 */
-	addis   r4, r0, CONFIG_SYS_IBAT5L@h
-	ori     r4, r4, CONFIG_SYS_IBAT5L@l
-	addis   r3, r0, CONFIG_SYS_IBAT5U@h
-	ori     r3, r3, CONFIG_SYS_IBAT5U@l
+	addis   r4, r0, CFG_SYS_IBAT5L@h
+	ori     r4, r4, CFG_SYS_IBAT5L@l
+	addis   r3, r0, CFG_SYS_IBAT5U@h
+	ori     r3, r3, CFG_SYS_IBAT5U@l
 	mtspr   IBAT5L, r4
 	mtspr   IBAT5U, r3
 
 	/* DBAT 5 */
-	addis   r4, r0, CONFIG_SYS_DBAT5L@h
-	ori     r4, r4, CONFIG_SYS_DBAT5L@l
-	addis   r3, r0, CONFIG_SYS_DBAT5U@h
-	ori     r3, r3, CONFIG_SYS_DBAT5U@l
+	addis   r4, r0, CFG_SYS_DBAT5L@h
+	ori     r4, r4, CFG_SYS_DBAT5L@l
+	addis   r3, r0, CFG_SYS_DBAT5U@h
+	ori     r3, r3, CFG_SYS_DBAT5U@l
 	mtspr   DBAT5L, r4
 	mtspr   DBAT5U, r3
 
 	/* IBAT 6 */
-	addis   r4, r0, CONFIG_SYS_IBAT6L@h
-	ori     r4, r4, CONFIG_SYS_IBAT6L@l
-	addis   r3, r0, CONFIG_SYS_IBAT6U@h
-	ori     r3, r3, CONFIG_SYS_IBAT6U@l
+	addis   r4, r0, CFG_SYS_IBAT6L@h
+	ori     r4, r4, CFG_SYS_IBAT6L@l
+	addis   r3, r0, CFG_SYS_IBAT6U@h
+	ori     r3, r3, CFG_SYS_IBAT6U@l
 	mtspr   IBAT6L, r4
 	mtspr   IBAT6U, r3
 
 	/* DBAT 6 */
-	addis   r4, r0, CONFIG_SYS_DBAT6L@h
-	ori     r4, r4, CONFIG_SYS_DBAT6L@l
-	addis   r3, r0, CONFIG_SYS_DBAT6U@h
-	ori     r3, r3, CONFIG_SYS_DBAT6U@l
+	addis   r4, r0, CFG_SYS_DBAT6L@h
+	ori     r4, r4, CFG_SYS_DBAT6L@l
+	addis   r3, r0, CFG_SYS_DBAT6U@h
+	ori     r3, r3, CFG_SYS_DBAT6U@l
 	mtspr   DBAT6L, r4
 	mtspr   DBAT6U, r3
 
 	/* IBAT 7 */
-	addis   r4, r0, CONFIG_SYS_IBAT7L@h
-	ori     r4, r4, CONFIG_SYS_IBAT7L@l
-	addis   r3, r0, CONFIG_SYS_IBAT7U@h
-	ori     r3, r3, CONFIG_SYS_IBAT7U@l
+	addis   r4, r0, CFG_SYS_IBAT7L@h
+	ori     r4, r4, CFG_SYS_IBAT7L@l
+	addis   r3, r0, CFG_SYS_IBAT7U@h
+	ori     r3, r3, CFG_SYS_IBAT7U@l
 	mtspr   IBAT7L, r4
 	mtspr   IBAT7U, r3
 
 	/* DBAT 7 */
-	addis   r4, r0, CONFIG_SYS_DBAT7L@h
-	ori     r4, r4, CONFIG_SYS_DBAT7L@l
-	addis   r3, r0, CONFIG_SYS_DBAT7U@h
-	ori     r3, r3, CONFIG_SYS_DBAT7U@l
+	addis   r4, r0, CFG_SYS_DBAT7L@h
+	ori     r4, r4, CFG_SYS_DBAT7L@l
+	addis   r3, r0, CFG_SYS_DBAT7U@h
+	ori     r3, r3, CFG_SYS_DBAT7U@l
 	mtspr   DBAT7L, r4
 	mtspr   DBAT7U, r3
 #endif
@@ -1095,7 +1095,7 @@ unlock_ram_in_cache:
 #endif /* !MINIMAL_SPL */
 #endif /* CONFIG_SYS_INIT_RAM_LOCK */
 
-#ifdef CONFIG_SYS_FLASHBOOT
+#ifdef CFG_SYS_FLASHBOOT
 map_flash_by_law1:
 	/* When booting from ROM (Flash or EPROM), clear the  */
 	/* Address Mask in OR0 so ROM appears everywhere      */
@@ -1182,4 +1182,4 @@ remap_flash_by_law0:
 	twi 0,r4,0
 	isync
 	blr
-#endif /* CONFIG_SYS_FLASHBOOT */
+#endif /* CFG_SYS_FLASHBOOT */
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index f07e8ab388..96183ac2c8 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -73,11 +73,11 @@ void usb_single_source_clk_configure(struct ccsr_usb_phy *usb_phy)
 	get_sys_info(&sysinfo);
 	if (sysinfo.diff_sysclk == 1) {
 		clrbits_be32(&usb_phy->pllprg[1],
-			     CONFIG_SYS_FSL_USB_PLLPRG2_MFI);
+			     CFG_SYS_FSL_USB_PLLPRG2_MFI);
 		setbits_be32(&usb_phy->pllprg[1],
-			     CONFIG_SYS_FSL_USB_PLLPRG2_REF_DIV_INTERNAL_CLK |
-			     CONFIG_SYS_FSL_USB_PLLPRG2_MFI_INTERNAL_CLK |
-			     CONFIG_SYS_FSL_USB_INTERNAL_SOC_CLK_EN);
+			     CFG_SYS_FSL_USB_PLLPRG2_REF_DIV_INTERNAL_CLK |
+			     CFG_SYS_FSL_USB_PLLPRG2_MFI_INTERNAL_CLK |
+			     CFG_SYS_FSL_USB_INTERNAL_SOC_CLK_EN);
 		}
 }
 #endif
@@ -89,18 +89,18 @@ void fsl_erratum_a006261_workaround(struct ccsr_usb_phy __iomem *usb_phy)
 	u32 xcvrprg = in_be32(&usb_phy->port1.xcvrprg);
 
 	/* Increase Disconnect Threshold by 50mV */
-	xcvrprg &= ~CONFIG_SYS_FSL_USB_XCVRPRG_HS_DCNT_PROG_MASK |
+	xcvrprg &= ~CFG_SYS_FSL_USB_XCVRPRG_HS_DCNT_PROG_MASK |
 						INC_DCNT_THRESHOLD_50MV;
 	/* Enable programming of USB High speed Disconnect threshold */
-	xcvrprg |= CONFIG_SYS_FSL_USB_XCVRPRG_HS_DCNT_PROG_EN;
+	xcvrprg |= CFG_SYS_FSL_USB_XCVRPRG_HS_DCNT_PROG_EN;
 	out_be32(&usb_phy->port1.xcvrprg, xcvrprg);
 
 	xcvrprg = in_be32(&usb_phy->port2.xcvrprg);
 	/* Increase Disconnect Threshold by 50mV */
-	xcvrprg &= ~CONFIG_SYS_FSL_USB_XCVRPRG_HS_DCNT_PROG_MASK |
+	xcvrprg &= ~CFG_SYS_FSL_USB_XCVRPRG_HS_DCNT_PROG_MASK |
 						INC_DCNT_THRESHOLD_50MV;
 	/* Enable programming of USB High speed Disconnect threshold */
-	xcvrprg |= CONFIG_SYS_FSL_USB_XCVRPRG_HS_DCNT_PROG_EN;
+	xcvrprg |= CFG_SYS_FSL_USB_XCVRPRG_HS_DCNT_PROG_EN;
 	out_be32(&usb_phy->port2.xcvrprg, xcvrprg);
 #else
 
@@ -108,22 +108,22 @@ void fsl_erratum_a006261_workaround(struct ccsr_usb_phy __iomem *usb_phy)
 	u32 status = in_be32(&usb_phy->status1);
 
 	u32 squelch_prog_rd_0_2 =
-		(status >> CONFIG_SYS_FSL_USB_SQUELCH_PROG_RD_0)
-			& CONFIG_SYS_FSL_USB_SQUELCH_PROG_MASK;
+		(status >> CFG_SYS_FSL_USB_SQUELCH_PROG_RD_0)
+			& CFG_SYS_FSL_USB_SQUELCH_PROG_MASK;
 
 	u32 squelch_prog_rd_3_5 =
-		(status >> CONFIG_SYS_FSL_USB_SQUELCH_PROG_RD_3)
-			& CONFIG_SYS_FSL_USB_SQUELCH_PROG_MASK;
+		(status >> CFG_SYS_FSL_USB_SQUELCH_PROG_RD_3)
+			& CFG_SYS_FSL_USB_SQUELCH_PROG_MASK;
 
 	setbits_be32(&usb_phy->config1,
-		     CONFIG_SYS_FSL_USB_HS_DISCNCT_INC);
+		     CFG_SYS_FSL_USB_HS_DISCNCT_INC);
 	setbits_be32(&usb_phy->config2,
-		     CONFIG_SYS_FSL_USB_RX_AUTO_CAL_RD_WR_SEL);
+		     CFG_SYS_FSL_USB_RX_AUTO_CAL_RD_WR_SEL);
 
-	temp = squelch_prog_rd_0_2 << CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_3;
+	temp = squelch_prog_rd_0_2 << CFG_SYS_FSL_USB_SQUELCH_PROG_WR_3;
 	out_be32(&usb_phy->config2, in_be32(&usb_phy->config2) | temp);
 
-	temp = squelch_prog_rd_3_5 << CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_0;
+	temp = squelch_prog_rd_3_5 << CFG_SYS_FSL_USB_SQUELCH_PROG_WR_0;
 	out_be32(&usb_phy->config2, in_be32(&usb_phy->config2) | temp);
 #endif
 }
@@ -827,7 +827,7 @@ int cpu_init_r(void)
 			fsl_erratum_a006261_workaround(usb_phy1);
 #endif
 		out_be32(&usb_phy1->usb_enable_override,
-				CONFIG_SYS_FSL_USB_ENABLE_OVERRIDE);
+				CFG_SYS_FSL_USB_ENABLE_OVERRIDE);
 	}
 #endif
 #ifdef CONFIG_SYS_FSL_USB2_PHY_ENABLE
@@ -839,7 +839,7 @@ int cpu_init_r(void)
 			fsl_erratum_a006261_workaround(usb_phy2);
 #endif
 		out_be32(&usb_phy2->usb_enable_override,
-				CONFIG_SYS_FSL_USB_ENABLE_OVERRIDE);
+				CFG_SYS_FSL_USB_ENABLE_OVERRIDE);
 	}
 #endif
 
@@ -861,25 +861,25 @@ int cpu_init_r(void)
 		struct ccsr_usb_phy __iomem *usb_phy =
 			(void *)CFG_SYS_MPC85xx_USB1_PHY_ADDR;
 		setbits_be32(&usb_phy->pllprg[1],
-			     CONFIG_SYS_FSL_USB_PLLPRG2_PHY2_CLK_EN |
-			     CONFIG_SYS_FSL_USB_PLLPRG2_PHY1_CLK_EN |
-			     CONFIG_SYS_FSL_USB_PLLPRG2_MFI |
-			     CONFIG_SYS_FSL_USB_PLLPRG2_PLL_EN);
+			     CFG_SYS_FSL_USB_PLLPRG2_PHY2_CLK_EN |
+			     CFG_SYS_FSL_USB_PLLPRG2_PHY1_CLK_EN |
+			     CFG_SYS_FSL_USB_PLLPRG2_MFI |
+			     CFG_SYS_FSL_USB_PLLPRG2_PLL_EN);
 #ifdef CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
 		usb_single_source_clk_configure(usb_phy);
 #endif
 		setbits_be32(&usb_phy->port1.ctrl,
-			     CONFIG_SYS_FSL_USB_CTRL_PHY_EN);
+			     CFG_SYS_FSL_USB_CTRL_PHY_EN);
 		setbits_be32(&usb_phy->port1.drvvbuscfg,
-			     CONFIG_SYS_FSL_USB_DRVVBUS_CR_EN);
+			     CFG_SYS_FSL_USB_DRVVBUS_CR_EN);
 		setbits_be32(&usb_phy->port1.pwrfltcfg,
-			     CONFIG_SYS_FSL_USB_PWRFLT_CR_EN);
+			     CFG_SYS_FSL_USB_PWRFLT_CR_EN);
 		setbits_be32(&usb_phy->port2.ctrl,
-			     CONFIG_SYS_FSL_USB_CTRL_PHY_EN);
+			     CFG_SYS_FSL_USB_CTRL_PHY_EN);
 		setbits_be32(&usb_phy->port2.drvvbuscfg,
-			     CONFIG_SYS_FSL_USB_DRVVBUS_CR_EN);
+			     CFG_SYS_FSL_USB_DRVVBUS_CR_EN);
 		setbits_be32(&usb_phy->port2.pwrfltcfg,
-			     CONFIG_SYS_FSL_USB_PWRFLT_CR_EN);
+			     CFG_SYS_FSL_USB_PWRFLT_CR_EN);
 
 #ifdef CONFIG_SYS_FSL_ERRATUM_A006261
 		if (has_erratum_a006261())
diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c
index 35142508c3..e26436bf57 100644
--- a/arch/powerpc/cpu/mpc85xx/fdt.c
+++ b/arch/powerpc/cpu/mpc85xx/fdt.c
@@ -532,7 +532,7 @@ void fdt_fixup_dma3(void *blob)
 	int nodeoff;
 	ccsr_gur_t __iomem *gur = (void *)(CFG_SYS_MPC85xx_GUTS_ADDR);
 
-#define CONFIG_SYS_ELO3_DMA3 (0xffe000000 + 0x102300)
+#define CFG_SYS_ELO3_DMA3 (0xffe000000 + 0x102300)
 #if defined(CONFIG_ARCH_T2080)
 	u32 srds_prtcl_s2 = in_be32(&gur->rcwsr[4]) &
 				    FSL_CORENET2_RCWSR4_SRDS2_PRTCL;
@@ -554,7 +554,7 @@ void fdt_fixup_dma3(void *blob)
 	case 16:
 #endif
 		nodeoff = fdt_node_offset_by_compat_reg(blob, "fsl,elo3-dma",
-							CONFIG_SYS_ELO3_DMA3);
+							CFG_SYS_ELO3_DMA3);
 		if (nodeoff > 0)
 			fdt_status_disabled(blob, nodeoff);
 		else
@@ -616,11 +616,11 @@ void ft_cpu_setup(void *blob, struct bd_info *bd)
 
 	fdt_add_enet_stashing(blob);
 
-#ifndef CONFIG_FSL_TBCLK_EXTRA_DIV
-#define CONFIG_FSL_TBCLK_EXTRA_DIV 1
+#ifndef CFG_FSL_TBCLK_EXTRA_DIV
+#define CFG_FSL_TBCLK_EXTRA_DIV 1
 #endif
 	do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
-		"timebase-frequency", get_tbclk() / CONFIG_FSL_TBCLK_EXTRA_DIV,
+		"timebase-frequency", get_tbclk() / CFG_FSL_TBCLK_EXTRA_DIV,
 		1);
 	do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
 		"bus-frequency", bd->bi_busfreq, 1);
diff --git a/arch/powerpc/cpu/mpc85xx/liodn.c b/arch/powerpc/cpu/mpc85xx/liodn.c
index 18790921dd..4b8844a4d9 100644
--- a/arch/powerpc/cpu/mpc85xx/liodn.c
+++ b/arch/powerpc/cpu/mpc85xx/liodn.c
@@ -255,14 +255,14 @@ static void fdt_fixup_srio_liodn(void *blob, struct srio_liodn_id_table *tbl)
 }
 #endif
 
-#define CONFIG_SYS_MAX_PCI_EPS		8
+#define CFG_SYS_MAX_PCI_EPS		8
 
 static void fdt_fixup_pci_liodn_offsets(void *fdt, const char *compat,
 					int ep_liodn_start)
 {
 	int off, pci_idx = 0, pci_cnt = 0, i, rc;
 	const uint32_t *base_liodn;
-	uint32_t liodn_offs[CONFIG_SYS_MAX_PCI_EPS + 1] = { 0 };
+	uint32_t liodn_offs[CFG_SYS_MAX_PCI_EPS + 1] = { 0 };
 
 	/*
 	 * Count the number of pci nodes.
@@ -282,7 +282,7 @@ static void fdt_fixup_pci_liodn_offsets(void *fdt, const char *compat,
 			       path, fdt_strerror(rc));
 			continue;
 		}
-		for (i = 0; i < CONFIG_SYS_MAX_PCI_EPS; i++)
+		for (i = 0; i < CFG_SYS_MAX_PCI_EPS; i++)
 			liodn_offs[i + 1] = ep_liodn_start +
 					i * pci_cnt + pci_idx - *base_liodn;
 		rc = fdt_setprop(fdt, off, "fsl,liodn-offset-list",
diff --git a/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c b/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c
index 1c051d1898..8e1f6c964d 100644
--- a/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c
+++ b/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c
@@ -240,8 +240,8 @@ int pamu_init(void)
 	spaact_size = sizeof(struct paace) * NUM_SPAACT_ENTRIES;
 
 	/* Allocate space for Primary PAACT Table */
-#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_PPAACT_ADDR))
-	ppaact = (void *)CONFIG_SPL_PPAACT_ADDR;
+#if (defined(CONFIG_SPL_BUILD) && defined(CFG_SPL_PPAACT_ADDR))
+	ppaact = (void *)CFG_SPL_PPAACT_ADDR;
 #else
 	ppaact = memalign(PAMU_TABLE_ALIGNMENT, ppaact_size);
 	if (!ppaact)
@@ -250,8 +250,8 @@ int pamu_init(void)
 	memset(ppaact, 0, ppaact_size);
 
 	/* Allocate space for Secondary PAACT Table */
-#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SPAACT_ADDR))
-	sec = (void *)CONFIG_SPL_SPAACT_ADDR;
+#if (defined(CONFIG_SPL_BUILD) && defined(CFG_SPL_SPAACT_ADDR))
+	sec = (void *)CFG_SPL_SPAACT_ADDR;
 #else
 	sec = memalign(PAMU_TABLE_ALIGNMENT, spaact_size);
 	if (!sec)
@@ -266,7 +266,7 @@ int pamu_init(void)
 	spaact_lim = spaact_phys + spaact_size;
 
 	/* Configure all PAMU's */
-	for (i = 0; i < CONFIG_NUM_PAMU; i++) {
+	for (i = 0; i < CFG_NUM_PAMU; i++) {
 		regs = (struct ccsr_pamu *)base_addr;
 
 		out_be32(&regs->ppbah, ppaact_phys >> 32);
@@ -293,7 +293,7 @@ void pamu_enable(void)
 {
 	u32 i = 0;
 	u32 base_addr = CFG_SYS_PAMU_ADDR;
-	for (i = 0; i < CONFIG_NUM_PAMU; i++) {
+	for (i = 0; i < CFG_NUM_PAMU; i++) {
 		setbits_be32((void *)base_addr + PAMU_PCR_OFFSET,
 			     PAMU_PCR_PE);
 		sync();
@@ -307,7 +307,7 @@ void pamu_reset(void)
 	u32 base_addr = CFG_SYS_PAMU_ADDR;
 	struct ccsr_pamu *regs;
 
-	for (i = 0; i < CONFIG_NUM_PAMU; i++) {
+	for (i = 0; i < CFG_NUM_PAMU; i++) {
 		regs = (struct ccsr_pamu *)base_addr;
 	/* Clear PPAACT Base register */
 		out_be32(&regs->ppbah, 0);
@@ -331,7 +331,7 @@ void pamu_disable(void)
 	u32 base_addr = CFG_SYS_PAMU_ADDR;
 
 
-	for (i = 0; i < CONFIG_NUM_PAMU; i++) {
+	for (i = 0; i < CFG_NUM_PAMU; i++) {
 		clrbits_be32((void *)base_addr + PAMU_PCR_OFFSET, PAMU_PCR_PE);
 		sync();
 		base_addr += PAMU_OFFSET;
diff --git a/arch/powerpc/include/asm/fsl_pamu.h b/arch/powerpc/include/asm/fsl_pamu.h
index 07e822b796..d0d33fd163 100644
--- a/arch/powerpc/include/asm/fsl_pamu.h
+++ b/arch/powerpc/include/asm/fsl_pamu.h
@@ -6,7 +6,7 @@
 #ifndef __PAMU_H
 #define __PAMU_H
 
-#define CONFIG_NUM_PAMU		16
+#define CFG_NUM_PAMU		16
 #define NUM_PPAACT_ENTRIES	512
 #define NUM_SPAACT_ENTRIES	256
 
diff --git a/arch/powerpc/include/asm/fsl_secure_boot.h b/arch/powerpc/include/asm/fsl_secure_boot.h
index 236098e718..221f9d842a 100644
--- a/arch/powerpc/include/asm/fsl_secure_boot.h
+++ b/arch/powerpc/include/asm/fsl_secure_boot.h
@@ -41,10 +41,10 @@
  * PPAACT and SPAACT table for PAMU must be placed on DDR after DDR init
  * due to space crunch on CPC and thus malloc will not work.
  */
-#define CONFIG_SPL_PPAACT_ADDR		0x2e000000
-#define CONFIG_SPL_SPAACT_ADDR		0x2f000000
-#define CONFIG_SPL_JR0_LIODN_S		454
-#define CONFIG_SPL_JR0_LIODN_NS		458
+#define CFG_SPL_PPAACT_ADDR		0x2e000000
+#define CFG_SPL_SPAACT_ADDR		0x2f000000
+#define CFG_SPL_JR0_LIODN_S		454
+#define CFG_SPL_JR0_LIODN_NS		458
 #endif /* ifdef CONFIG_SPL_BUILD */
 
 #ifndef CONFIG_SPL_BUILD
diff --git a/arch/powerpc/lib/bootm.c b/arch/powerpc/lib/bootm.c
index 1df0822e9d..7b392b06bc 100644
--- a/arch/powerpc/lib/bootm.c
+++ b/arch/powerpc/lib/bootm.c
@@ -41,8 +41,8 @@ static ulong get_sp (void);
 extern void ft_fixup_num_cores(void *blob);
 static void set_clocks_in_mhz (struct bd_info *kbd);
 
-#ifndef CONFIG_SYS_LINUX_LOWMEM_MAX_SIZE
-#define CONFIG_SYS_LINUX_LOWMEM_MAX_SIZE	(768*1024*1024)
+#ifndef CFG_SYS_LINUX_LOWMEM_MAX_SIZE
+#define CFG_SYS_LINUX_LOWMEM_MAX_SIZE	(768*1024*1024)
 #endif
 
 static void boot_jump_linux(struct bootm_headers *images)
@@ -133,7 +133,7 @@ void arch_lmb_reserve(struct lmb *lmb)
 #endif
 
 	size = min(bootm_size, get_effective_memsize());
-	size = min(size, (ulong)CONFIG_SYS_LINUX_LOWMEM_MAX_SIZE);
+	size = min(size, (ulong)CFG_SYS_LINUX_LOWMEM_MAX_SIZE);
 
 	if (size < bootm_size) {
 		ulong base = bootmap_base + size;
diff --git a/arch/powerpc/lib/interrupts.c b/arch/powerpc/lib/interrupts.c
index bdb8030c27..df312dfa28 100644
--- a/arch/powerpc/lib/interrupts.c
+++ b/arch/powerpc/lib/interrupts.c
@@ -17,8 +17,8 @@
 #include <asm/ptrace.h>
 
 #ifndef CONFIG_MPC83XX_TIMER
-#ifndef CONFIG_SYS_WATCHDOG_FREQ
-#define CONFIG_SYS_WATCHDOG_FREQ (CONFIG_SYS_HZ / 2)
+#ifndef CFG_SYS_WATCHDOG_FREQ
+#define CFG_SYS_WATCHDOG_FREQ (CONFIG_SYS_HZ / 2)
 #endif
 
 static unsigned decrementer_count; /* count value for 1e6/HZ microseconds */
@@ -80,7 +80,7 @@ void timer_interrupt(struct pt_regs *regs)
 	timestamp++;
 
 #if defined(CONFIG_WATCHDOG) || defined (CONFIG_HW_WATCHDOG)
-	if (CONFIG_SYS_WATCHDOG_FREQ && (timestamp % (CONFIG_SYS_WATCHDOG_FREQ)) == 0)
+	if (CFG_SYS_WATCHDOG_FREQ && (timestamp % (CFG_SYS_WATCHDOG_FREQ)) == 0)
 		schedule();
 #endif    /* CONFIG_WATCHDOG || CONFIG_HW_WATCHDOG */