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author | Ovidiu Panait <ovidiu.panait@windriver.com> | 2021-11-30 18:33:57 +0200 |
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committer | Michal Simek <michal.simek@xilinx.com> | 2022-01-05 10:22:03 +0100 |
commit | fc7220f0c4ed2ce7bc89f50c33f37e39b77e2690 (patch) | |
tree | adba3870a6e4c31b6cb096ea903da666cb3a174b /arch/microblaze | |
parent | f149ee4c36dd907de496ff1a370adcdea5cb17ce (diff) | |
download | u-boot-fc7220f0c4ed2ce7bc89f50c33f37e39b77e2690.tar.gz u-boot-fc7220f0c4ed2ce7bc89f50c33f37e39b77e2690.tar.bz2 u-boot-fc7220f0c4ed2ce7bc89f50c33f37e39b77e2690.zip |
microblaze: branch to base vector address on reset
Current code assumes that the vector base address is always at 0x0.
However, this value is configurable for MicroBlaze using the
CONFIG_XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option. Update the
reset routines to branch to this location instead.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/20211130163358.2531677-10-ovidiu.panait@windriver.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/microblaze')
-rw-r--r-- | arch/microblaze/cpu/spl.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/microblaze/cpu/spl.c b/arch/microblaze/cpu/spl.c index 06d4af99b2..cea6d56f16 100644 --- a/arch/microblaze/cpu/spl.c +++ b/arch/microblaze/cpu/spl.c @@ -12,6 +12,7 @@ #include <spl.h> #include <asm/io.h> #include <asm/u-boot.h> +#include <linux/stringify.h> bool boot_linux; @@ -54,8 +55,9 @@ int spl_start_uboot(void) int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { - __asm__ __volatile__ ("mts rmsr, r0;" \ - "bra r0"); + __asm__ __volatile__ ( + "mts rmsr, r0;" \ + "brai " __stringify(CONFIG_XILINX_MICROBLAZE0_VECTOR_BASE_ADDR)); return 0; } |