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| author | Marek Vasut <marex@denx.de> | 2021-11-13 03:27:37 +0100 |
|---|---|---|
| committer | Patrice Chotard <patrice.chotard@foss.st.com> | 2021-11-30 16:43:28 +0100 |
| commit | 312011e8e7ba1a5cf2234dae73daa8304f5993dd (patch) | |
| tree | 99504ce6d2fd421de26f35dfeeba012a0ca0306d /arch/arm | |
| parent | 525dd34535005ecde1cde7235c4d1d7329617248 (diff) | |
| download | u-boot-312011e8e7ba1a5cf2234dae73daa8304f5993dd.tar.gz u-boot-312011e8e7ba1a5cf2234dae73daa8304f5993dd.tar.bz2 u-boot-312011e8e7ba1a5cf2234dae73daa8304f5993dd.zip | |
ARM: dts: stm32: Add custom PHY reset bindings on AV96
The ethernet PHY must be reset on AV96, however DWMAC currently does
not support the MDIO-bus PHY GPIO reset bindings and the ethernet MAC
PHY reset property is going away on next DT sync. Add PHY specific
reset bindings to trigger the PHY reset and fix sporadic ethernet
malfunctions, until the next DT sync.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi index 8b275e4950..4b1dbf0838 100644 --- a/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi +++ b/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi @@ -19,6 +19,17 @@ }; }; + +ðernet0 { + mdio0 { + ethernet-phy@7 { + reset-gpios = <&gpioz 2 GPIO_ACTIVE_LOW>; + reset-assert-us = <11000>; + reset-deassert-us = <1000>; + }; + }; +}; + &sdmmc1 { u-boot,dm-spl; }; |