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| author | Lukasz Majewski <lukma@denx.de> | 2018-12-05 17:04:03 +0100 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2019-02-15 12:16:50 +0100 |
| commit | dc619924c7734e14c459cec2fb5afcec27052bea (patch) | |
| tree | 3d7b42abfd001e057af0fe05451e13f308f37270 /arch/arm/mach-imx | |
| parent | 548cc1095f290a0787476d61de32213a9195ff7b (diff) | |
| download | u-boot-dc619924c7734e14c459cec2fb5afcec27052bea.tar.gz u-boot-dc619924c7734e14c459cec2fb5afcec27052bea.tar.bz2 u-boot-dc619924c7734e14c459cec2fb5afcec27052bea.zip | |
ddr: vybrid: Add calibration code to memory controler's (DDRMC) setup code
This patch extends the vf610 DDR memory controller code to support SW
leveling.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Stefan Agner <stefan.agner@toradex.com>
Diffstat (limited to 'arch/arm/mach-imx')
| -rw-r--r-- | arch/arm/mach-imx/ddrmc-vf610.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/ddrmc-vf610.c b/arch/arm/mach-imx/ddrmc-vf610.c index fa948f7812..461fba4d3f 100644 --- a/arch/arm/mach-imx/ddrmc-vf610.c +++ b/arch/arm/mach-imx/ddrmc-vf610.c @@ -10,6 +10,7 @@ #include <asm/arch/imx-regs.h> #include <asm/arch/iomux-vf610.h> #include <asm/arch/ddrmc-vf610.h> +#include "ddrmc-vf610-calibration.h" void ddrmc_setup_iomux(const iomux_v3_cfg_t *pads, int pads_count) { @@ -235,4 +236,8 @@ void ddrmc_ctrl_init_ddr3(struct ddr3_jedec_timings const *timings, while (!(readl(&ddrmr->cr[80]) & DDRMC_CR80_MC_INIT_COMPLETE)) udelay(10); writel(DDRMC_CR80_MC_INIT_COMPLETE, &ddrmr->cr[81]); + +#ifdef CONFIG_DDRMC_VF610_CALIBRATION + ddrmc_calibration(ddrmr); +#endif } |