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authorAlbert ARIBAUD <albert.u.boot@aribaud.net>2014-04-15 16:13:47 +0200
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2014-05-15 16:24:26 +0200
commitb4ee1491b917951c0f57e18fd816a4211f5829d4 (patch)
tree1b9ebaf93784b7bd0c65db38ccccd4580d84ca00 /arch/arm/lib/cache.c
parentd2a3e911390f9fc4d8c0ee4b3c7fc75f4fd3fd19 (diff)
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arm1136: move cache code from start.S to cache.c
arch/arm/cpu/arm1136/start.S contain a cache flushing function. Remove the function and move its code into arch/arm/lib/cache.c. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Diffstat (limited to 'arch/arm/lib/cache.c')
-rw-r--r--arch/arm/lib/cache.c13
1 files changed, 10 insertions, 3 deletions
diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c
index 6cc136aa3c..4f6b9f01cb 100644
--- a/arch/arm/lib/cache.c
+++ b/arch/arm/lib/cache.c
@@ -12,16 +12,23 @@
void __flush_cache(unsigned long start, unsigned long size)
{
#if defined(CONFIG_ARM1136)
- void arm1136_cache_flush(void);
- arm1136_cache_flush();
+#if !defined(CONFIG_SYS_ICACHE_OFF)
+ asm("mcr p15, 0, r1, c7, c5, 0"); /* invalidate I cache */
#endif
+
+#if !defined(CONFIG_SYS_DCACHE_OFF)
+ asm("mcr p15, 0, r1, c7, c14, 0"); /* Clean+invalidate D cache */
+#endif
+
+#endif /* CONFIG_ARM1136 */
+
#ifdef CONFIG_ARM926EJS
/* test and clean, page 2-23 of arm926ejs manual */
asm("0: mrc p15, 0, r15, c7, c10, 3\n\t" "bne 0b\n" : : : "memory");
/* disable write buffer as well (page 2-22) */
asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (0));
-#endif
+#endif /* CONFIG_ARM926EJS */
return;
}
void flush_cache(unsigned long start, unsigned long size)