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| author | Caleb Connolly <caleb.connolly@linaro.org> | 2023-11-14 12:55:42 +0000 |
|---|---|---|
| committer | Caleb Connolly <caleb.connolly@linaro.org> | 2024-01-16 12:26:52 +0000 |
| commit | 2c2cc3e9c0273d4ecfd33c17fc6fb50a8fb5bcf5 (patch) | |
| tree | 186e44ac52b68552e5fd54d3f29dc887a875c40a /arch/arm/dts/starqltechn.dts | |
| parent | 24d2908e987af6b435ac818eda44fe81152296fb (diff) | |
| download | u-boot-2c2cc3e9c0273d4ecfd33c17fc6fb50a8fb5bcf5.tar.gz u-boot-2c2cc3e9c0273d4ecfd33c17fc6fb50a8fb5bcf5.tar.bz2 u-boot-2c2cc3e9c0273d4ecfd33c17fc6fb50a8fb5bcf5.zip | |
pinctrl: qcom: make compatible with linux DTs
The pinctrl and GPIO drivers are currently heavily incompatible with
upstream. Most Qualcomm pinctrl blocks feature "tiles" of pins, each at
it's own address. Introduce support for these by allowing the soc driver
to specify per-pin register offsets similarly to the Linux driver.
Adjust the GPIO driver to handle these too, and finally enable support
for all pins with the same numbering as used in Linux.
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Diffstat (limited to 'arch/arm/dts/starqltechn.dts')
| -rw-r--r-- | arch/arm/dts/starqltechn.dts | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/arch/arm/dts/starqltechn.dts b/arch/arm/dts/starqltechn.dts index eec51d165f..5b6372bee7 100644 --- a/arch/arm/dts/starqltechn.dts +++ b/arch/arm/dts/starqltechn.dts @@ -65,15 +65,15 @@ serial@a84000 { status = "okay"; }; + }; +}; - pinctrl_north@3900000 { - muic_i2c: muic_i2c { - pins = "GPIO_33", "GPIO_34"; - drive-strength = <0x2>; - function = "gpio"; - bias-disable; - }; - }; +&tlmm { + muic_i2c: muic-i2c-n { + pins = "GPIO_33", "GPIO_34"; + drive-strength = <0x2>; + function = "gpio"; + bias-disable; }; }; |