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author | Jianchao Wang <jianchao.wang@nxp.com> | 2019-07-19 00:30:01 +0300 |
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committer | Joe Hershberger <joe.hershberger@ni.com> | 2019-07-25 13:13:31 -0500 |
commit | 8782122052481f60638c2191a5512a644bb57abb (patch) | |
tree | 77d9dadf3fa0155411220a68ad0871866827273d /arch/arm/dts/ls1021a-tsn.dts | |
parent | c40e65eb16e4b57697bb90dae0f6ca0303e7dfe7 (diff) | |
download | u-boot-8782122052481f60638c2191a5512a644bb57abb.tar.gz u-boot-8782122052481f60638c2191a5512a644bb57abb.tar.bz2 u-boot-8782122052481f60638c2191a5512a644bb57abb.zip |
Add support for the NXP LS1021A-TSN board
The LS1021A-TSN is a development board built by VVDN/Argonboards in
partnership with NXP.
It features the LS1021A SoC and the first-generation SJA1105T Ethernet
switch for prototyping implementations of a subset of IEEE 802.1 TSN
standards.
Supported boot media: microSD card (via SPL), QSPI flash.
Rev. A of the board uses a Spansion S25FL512S_256K serial flash, which
is 64 MB in size and has an erase sector size of 256KB (therefore,
flashing the RCW would erase part of U-Boot).
Rev. B and C of the board use a Spansion S25FL256S1 serial flash, which
is only 32 MB in size but has an erase sector size of 64KB (therefore
the RCW image can be flashed without erasing U-Boot).
To avoid the problems above, the U-Boot base address has been selected
at 0x100000 (the start of the 5th 256KB erase sector), which works for
all board revisions. Actually 0x40000 would have been enough, but
0x100000 is common for all Layerscape devices.
eTSEC3 is connecting directly to SJA1105 via an RGMII fixed-link, but
SJA1105 is currently not supported by uboot. Therefore, eTSEC3 is
disabled.
Signed-off-by: Xiaoliang Yang <xiaoliang.yang_1@nxp.com>
Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
Signed-off-by: Jianchao Wang <jianchao.wang@nxp.com>
Signed-off-by: Changming Huang <jerry.huang@nxp.com>
Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
[Vladimir] Code taken from https://github.com/openil/u-boot (which
itself is mostly copied from ls1021a-iot) and adapted with the following
changes:
- Add a008850 errata workaround
- Converted eTSEC, MMC to DM to avoid all build warnings
- Plugged in distro boot feature, including support for extlinux.conf
- Added defconfig for QSPI boot
- Added the board/freescale/ls1021atsn/README.rst for initial setup
- Increased CONFIG_SYS_MONITOR_LEN so that the SPL malloc pool does not
get overwritten during copying of the u-boot.bin payload from MMC to
DDR.
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/arm/dts/ls1021a-tsn.dts')
-rw-r--r-- | arch/arm/dts/ls1021a-tsn.dts | 77 |
1 files changed, 77 insertions, 0 deletions
diff --git a/arch/arm/dts/ls1021a-tsn.dts b/arch/arm/dts/ls1021a-tsn.dts new file mode 100644 index 0000000000..f633074099 --- /dev/null +++ b/arch/arm/dts/ls1021a-tsn.dts @@ -0,0 +1,77 @@ +// SPDX-License-Identifier: GPL-2.0 +/* Copyright 2016-2018 NXP Semiconductors + * Copyright 2019 Vladimir Oltean <olteanv@gmail.com> + */ + +/dts-v1/; +#include "ls1021a.dtsi" + +/ { + model = "NXP LS1021A-TSN Board"; + + aliases { + enet0-sgmii-phy = &sgmii_phy2; + enet1-sgmii-phy = &sgmii_phy1; + spi0 = &qspi; + spi1 = &dspi1; + }; +}; + +&enet0 { + tbi-handle = <&tbi0>; + phy-handle = <&sgmii_phy2>; + phy-mode = "sgmii"; + status = "okay"; +}; + +&enet1 { + tbi-handle = <&tbi1>; + phy-handle = <&sgmii_phy1>; + phy-mode = "sgmii"; + status = "okay"; +}; + +&i2c0 { + status = "okay"; +}; + +&mdio0 { + /* AR8031 */ + sgmii_phy1: ethernet-phy@1 { + reg = <0x1>; + }; + + /* AR8031 */ + sgmii_phy2: ethernet-phy@2 { + reg = <0x2>; + }; + + /* SGMII PCS for enet0 */ + tbi0: tbi-phy@1f { + reg = <0x1f>; + device_type = "tbi-phy"; + }; +}; + +&mdio1 { + /* SGMII PCS for enet1 */ + tbi1: tbi-phy@1f { + reg = <0x1f>; + device_type = "tbi-phy"; + }; +}; + +&qspi { + bus-num = <0>; + status = "okay"; + + flash@0 { + compatible = "spi-flash"; + spi-max-frequency = <20000000>; + reg = <0>; + }; +}; + +&uart0 { + status = "okay"; +}; |