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authorAlex Marginean <alexandru.marginean@nxp.com>2020-01-10 23:51:32 +0200
committerPriyanka Jain <priyanka.jain@nxp.com>2020-01-24 14:28:26 +0530
commit430a5542f33153b30a283c1d28d92f5826b176a1 (patch)
treeca0bc383ad3a9340bb3e085ef950b469527036df /arch/arm/cpu/armv8
parentb8e4eec79cb4e4c9a08084050a2111d13aa6a260 (diff)
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armv8: ls1028a_serdes: Add few missing serdes protocols
Add serdes protocol 0x7777, 0x9999, 0xb998, 0xbb56 to supported list. These protocols are supported and functional but they trigger a warning in U-Boot console at boot because they are not on this list. Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Diffstat (limited to 'arch/arm/cpu/armv8')
-rw-r--r--arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c
index 313f3f1e8a..80d2910f67 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c
@@ -35,6 +35,10 @@ static struct serdes_config serdes1_cfg_tbl[] = {
{0xEB58, {SGMII_T1, QSGMII_B, PCIE2, SATA1} },
{0xEB8B, {PCIE1, SGMII_T1, PCIE2, SATA1} },
{0xE8CC, {PCIE1, PCIE1, SGMII_T1, SATA1} },
+ {0x7777, {SGMII1, SGMII2, SGMII3, SGMII4} },
+ {0x9999, {SGMII1, SGMII2, SGMII3, SGMII4} },
+ {0xb998, {SGMII_T1, SGMII2, SGMII3, PCIE1} },
+ {0xbb56, {SGMII_T1, QSGMII_B, PCIE2, PCIE1} },
{}
};