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authorSimon Glass <sjg@chromium.org>2017-05-12 21:10:00 -0600
committerHeiko Schocher <hs@denx.de>2017-05-15 06:19:10 +0200
commitce3b5d69112b1adc878e06586c1bc819414309be (patch)
tree30b5537e6c4669f966184cf5c05723976a8bd602 /README
parent213f27f3f9c89dbf32e38cb031b303193e6e8627 (diff)
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Drop use of CONFIG_I2C_SOFT
This option is not used in U-Boot. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'README')
-rw-r--r--README32
1 files changed, 1 insertions, 31 deletions
diff --git a/README b/README
index 71d8de0ba8..9525199551 100644
--- a/README
+++ b/README
@@ -2204,37 +2204,7 @@ The following options need to be configured:
If you do not have i2c muxes on your board, omit this define.
-----under removal:
-
-- Legacy I2C Support: CONFIG_SOFT_I2C
-
- NOTE: It is intended to move drivers to CONFIG_SYS_I2C which
- provides the following compelling advantages:
-
- - more than one i2c adapter is usable
- - approved multibus support
- - better i2c mux support
-
- ** CONFIG_SOFT_I2C is now being removed **
-
- With CONFIG_SOFT_I2C you will need to define
- CONFIG_SYS_I2C_SPEED to be the frequency (in Hz) at which you
- wish your i2c bus to run and CONFIG_SYS_I2C_SLAVE to be the
- address of this node (ie the CPU's i2c node address).
-
- Now, the u-boot i2c code for the mpc8xx
- (arch/powerpc/cpu/mpc8xx/i2c.c) sets the CPU up as a master node
- and so its address should therefore be cleared to 0 (See,
- eg, MPC823e User's Manual p.16-473). So, set
- CONFIG_SYS_I2C_SLAVE to 0.
-
- When a board is reset during an i2c bus transfer
- chips might think that the current transfer is still
- in progress. Reset the slave devices by sending start
- commands until the slave device responds.
-
- That's all that's required for CONFIG_HARD_I2C.
-
+- Legacy I2C Support:
If you use the software i2c interface (CONFIG_SYS_I2C_SOFT)
then the following macros need to be defined (examples are
from include/configs/lwmon.h):