diff options
author | Tom Rini <trini@konsulko.com> | 2022-07-31 21:08:25 -0400 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2022-08-12 16:10:49 -0400 |
commit | 7ae1e6a3a39471fd9bed6b94e887747d8719b87a (patch) | |
tree | 4f5743f52caa7d86c3c635ea36e989861bf716cb | |
parent | 8b549c0b23619afbc9b8d26379710ecb937e20e2 (diff) | |
download | u-boot-7ae1e6a3a39471fd9bed6b94e887747d8719b87a.tar.gz u-boot-7ae1e6a3a39471fd9bed6b94e887747d8719b87a.tar.bz2 u-boot-7ae1e6a3a39471fd9bed6b94e887747d8719b87a.zip |
Convert CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE
Signed-off-by: Tom Rini <trini@konsulko.com>
-rw-r--r-- | configs/pico-imx6_defconfig | 1 | ||||
-rw-r--r-- | configs/warp7_bl33_defconfig | 1 | ||||
-rw-r--r-- | configs/warp7_defconfig | 1 | ||||
-rw-r--r-- | configs/warp_defconfig | 1 | ||||
-rw-r--r-- | drivers/mmc/Kconfig | 4 | ||||
-rw-r--r-- | include/configs/pico-imx6.h | 1 | ||||
-rw-r--r-- | include/configs/warp.h | 1 | ||||
-rw-r--r-- | include/configs/warp7.h | 1 |
8 files changed, 8 insertions, 3 deletions
diff --git a/configs/pico-imx6_defconfig b/configs/pico-imx6_defconfig index 086b3ee3ab..45f72d7e1e 100644 --- a/configs/pico-imx6_defconfig +++ b/configs/pico-imx6_defconfig @@ -72,6 +72,7 @@ CONFIG_FASTBOOT_BUF_SIZE=0x10000000 CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE=y CONFIG_FSL_USDHC=y CONFIG_PHYLIB=y CONFIG_PHY_ATHEROS=y diff --git a/configs/warp7_bl33_defconfig b/configs/warp7_bl33_defconfig index a50a1c8bc7..d1c0499254 100644 --- a/configs/warp7_bl33_defconfig +++ b/configs/warp7_bl33_defconfig @@ -47,6 +47,7 @@ CONFIG_SYS_DFU_DATA_BUF_SIZE=0x1000000 CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE=y CONFIG_FSL_USDHC=y CONFIG_MTD=y CONFIG_PINCTRL=y diff --git a/configs/warp7_defconfig b/configs/warp7_defconfig index 40f9e502e9..d0b4e747dd 100644 --- a/configs/warp7_defconfig +++ b/configs/warp7_defconfig @@ -54,6 +54,7 @@ CONFIG_SYS_DFU_DATA_BUF_SIZE=0x1000000 CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE=y CONFIG_FSL_USDHC=y CONFIG_MTD=y CONFIG_PINCTRL=y diff --git a/configs/warp_defconfig b/configs/warp_defconfig index 4c9f7051fe..63f2f21a1e 100644 --- a/configs/warp_defconfig +++ b/configs/warp_defconfig @@ -41,6 +41,7 @@ CONFIG_SYS_DFU_DATA_BUF_SIZE=0x1000000 CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MXC=y CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE=y CONFIG_FSL_USDHC=y CONFIG_POWER_LEGACY=y CONFIG_POWER_I2C=y diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index c5e1a1b098..0dcec8adce 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -864,6 +864,10 @@ config FSL_ESDHC_IMX This selects support for the i.MX eSDHC (Enhanced Secure Digital Host Controller) found on numerous Freescale/NXP SoCs. +config SYS_FSL_ESDHC_HAS_DDR_MODE + bool "i.MX eSDHC controller supports DDR mode" + depends on FSL_ESDHC_IMX + config FSL_USDHC bool "Freescale/NXP i.MX uSDHC controller support" depends on MX6 || MX7 ||ARCH_MX7ULP || IMX8 || IMX8M || IMX8ULP || IMX9 || IMXRT diff --git a/include/configs/pico-imx6.h b/include/configs/pico-imx6.h index df4dc4d496..dcbcd8d244 100644 --- a/include/configs/pico-imx6.h +++ b/include/configs/pico-imx6.h @@ -22,7 +22,6 @@ /* MMC Configuration */ #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR -#define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE /* USB Configs */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) diff --git a/include/configs/warp.h b/include/configs/warp.h index 7cb9743fdd..d2c4391935 100644 --- a/include/configs/warp.h +++ b/include/configs/warp.h @@ -18,7 +18,6 @@ /* MMC Configs */ #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR -#define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE /* Watchdog */ diff --git a/include/configs/warp7.h b/include/configs/warp7.h index c00ca4a111..7e9b25b07b 100644 --- a/include/configs/warp7.h +++ b/include/configs/warp7.h @@ -15,7 +15,6 @@ /* MMC Config*/ #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR -#define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE #define CONFIG_DFU_ENV_SETTINGS \ "dfu_alt_info=boot raw 0x2 0x1000 mmcpart 1\0" \ |