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author | Dario Binacchi <dario.binacchi@amarulasolutions.com> | 2023-01-28 17:04:04 +0100 |
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committer | Stefano Babic <sbabic@denx.de> | 2023-01-30 20:56:23 +0100 |
commit | 6629e1590495a476c05ce113c2b1f9e3e0b11da3 (patch) | |
tree | 40a48ecda614d2228a7d428f3c226e58a4cac827 | |
parent | f147aa80f52989c7455022ca1ab959e8545feccc (diff) | |
download | u-boot-6629e1590495a476c05ce113c2b1f9e3e0b11da3.tar.gz u-boot-6629e1590495a476c05ce113c2b1f9e3e0b11da3.tar.bz2 u-boot-6629e1590495a476c05ce113c2b1f9e3e0b11da3.zip |
arm: dts: imx8mn-u-boot: fix DDR3 only support
In case the CONFIG_IMX8M_LPDDR4 and CONFIG_IMX8M_DDR4 options are both
disabled (i. e. BSH boards), binmain fails because DDR4 bin files are
missing.
Fixes: 93c4c0e4dd1e75 ("arm: dts: imx8mn-u-boot: Create common imx8mn-u-boot.dtsi")
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
-rw-r--r-- | arch/arm/dts/imx8mn-u-boot.dtsi | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm/dts/imx8mn-u-boot.dtsi b/arch/arm/dts/imx8mn-u-boot.dtsi index 95f45ad252..ec53390afb 100644 --- a/arch/arm/dts/imx8mn-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-u-boot.dtsi @@ -105,10 +105,11 @@ align-end = <4>; }; +#if defined(CONFIG_IMX8M_LPDDR4) || defined(CONFIG_IMX8M_DDR4) ddr-2d-imem-fw { #ifdef CONFIG_IMX8M_LPDDR4 filename = "lpddr4_pmu_train_2d_imem.bin"; -#elif CONFIG_IMX8M_DDR4 +#else filename = "ddr4_imem_2d.bin"; #endif type = "blob-ext"; @@ -118,12 +119,13 @@ ddr-2d-dmem-fw { #ifdef CONFIG_IMX8M_LPDDR4 filename = "lpddr4_pmu_train_2d_dmem.bin"; -#elif CONFIG_IMX8M_DDR4 +#else filename = "ddr4_dmem_2d.bin"; #endif type = "blob-ext"; align-end = <4>; }; +#endif }; spl { |