diff options
| author | Axel Lin <axel.lin@ingics.com> | 2015-04-26 10:32:36 +0800 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2015-05-08 17:24:17 -0400 |
| commit | 895b5d65c7163436f06fa95281538f43e1a41d9e (patch) | |
| tree | 850a52756381b866b1155cdd85b789bb5e1ea095 | |
| parent | 5094befd84de1fe6ffbe515d8efe2f19963a17f5 (diff) | |
| download | u-boot-895b5d65c7163436f06fa95281538f43e1a41d9e.tar.gz u-boot-895b5d65c7163436f06fa95281538f43e1a41d9e.tar.bz2 u-boot-895b5d65c7163436f06fa95281538f43e1a41d9e.zip | |
gpio: stm32_gpio: Use clrsetbits_le32() at appropriate places
Use clrsetbits_le32() to replace clrbits_le32() + setbits_le32().
Signed-off-by: Axel Lin <axel.lin@ingics.com>
| -rw-r--r-- | drivers/gpio/stm32_gpio.c | 18 |
1 files changed, 5 insertions, 13 deletions
diff --git a/drivers/gpio/stm32_gpio.c b/drivers/gpio/stm32_gpio.c index d3497e9675..6d6fdb0b01 100644 --- a/drivers/gpio/stm32_gpio.c +++ b/drivers/gpio/stm32_gpio.c @@ -69,22 +69,14 @@ int stm32_gpio_config(const struct stm32_gpio_dsc *dsc, setbits_le32(&STM32_RCC->ahb1enr, 1 << dsc->port); i = (dsc->pin & 0x07) * 4; - clrbits_le32(&gpio_regs->afr[dsc->pin >> 3], (0xF << i)); - setbits_le32(&gpio_regs->afr[dsc->pin >> 3], ctl->af << i); + clrsetbits_le32(&gpio_regs->afr[dsc->pin >> 3], 0xF << i, ctl->af << i); i = dsc->pin * 2; - clrbits_le32(&gpio_regs->moder, (0x3 << i)); - setbits_le32(&gpio_regs->moder, ctl->mode << i); - - clrbits_le32(&gpio_regs->otyper, (0x3 << i)); - setbits_le32(&gpio_regs->otyper, ctl->otype << i); - - clrbits_le32(&gpio_regs->ospeedr, (0x3 << i)); - setbits_le32(&gpio_regs->ospeedr, ctl->speed << i); - - clrbits_le32(&gpio_regs->pupdr, (0x3 << i)); - setbits_le32(&gpio_regs->pupdr, ctl->pupd << i); + clrsetbits_le32(&gpio_regs->moder, 0x3 << i, ctl->mode << i); + clrsetbits_le32(&gpio_regs->otyper, 0x3 << i, ctl->otype << i); + clrsetbits_le32(&gpio_regs->ospeedr, 0x3 << i, ctl->speed << i); + clrsetbits_le32(&gpio_regs->pupdr, 0x3 << i, ctl->pupd << i); rv = 0; out: |