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| author | Lukasz Majewski <l.majewski@samsung.com> | 2016-05-12 12:52:03 +0200 |
|---|---|---|
| committer | Jaehoon Chung <jh80.chung@samsung.com> | 2016-05-18 15:32:12 +0900 |
| commit | cc469659304c3f2bf2bb4c6f4fe9484a7a2e0e69 (patch) | |
| tree | 75d9075c3db95524837e5ebc428690bf2a99a63a | |
| parent | 56520cdfb1d736ce485d73043a106807a742b61a (diff) | |
| download | u-boot-cc469659304c3f2bf2bb4c6f4fe9484a7a2e0e69.tar.gz u-boot-cc469659304c3f2bf2bb4c6f4fe9484a7a2e0e69.tar.bz2 u-boot-cc469659304c3f2bf2bb4c6f4fe9484a7a2e0e69.zip | |
TPL: TM2: clock: exynos: Add clock stubs for TM2 target
Those stubs are protected by CONFIG_TPL_TM2
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
| -rw-r--r-- | arch/arm/mach-exynos/clock.c | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/arm/mach-exynos/clock.c b/arch/arm/mach-exynos/clock.c index 3d31f9d524..8a8d085ffa 100644 --- a/arch/arm/mach-exynos/clock.c +++ b/arch/arm/mach-exynos/clock.c @@ -6,6 +6,7 @@ */ #include <common.h> +#ifndef CONFIG_TPL_TM2 #include <asm/io.h> #include <asm/arch/clock.h> #include <asm/arch/clk.h> @@ -1772,3 +1773,22 @@ int set_epll_clk(unsigned long rate) return 0; } +#else +unsigned long clock_get_periph_rate(int peripheral) +{ + /* PWM clock's parent is the SCLK_BUS_PLL (800MHz) divided by */ + /* 12 => ACLK_PERIC_66 MHz is produced */ + return 67000000; +} + +#define PERIPH_ID_PWM0 132 +unsigned long get_pwm_clk(void) +{ + return clock_get_periph_rate(PERIPH_ID_PWM0); +} + +unsigned long get_mmc_clk(int dev_index) +{ + return 100000000; +} +#endif /* CONFIG_TPL_TM2 */ |