diff options
| author | Marek Szyprowski <m.szyprowski@samsung.com> | 2024-08-29 16:30:50 +0200 |
|---|---|---|
| committer | Marek Szyprowski <m.szyprowski@samsung.com> | 2024-08-29 16:46:37 +0200 |
| commit | 4308eeb3ef9b95472f86f8753cef2ee40a069baa (patch) | |
| tree | 96a7f1f1c3a91b7909dd5c182c214371ba81be51 | |
| parent | 8ce2a1fc145906cea9171d45ba8ef9fad78fcf89 (diff) | |
| download | linux-thead-4308eeb3ef9b95472f86f8753cef2ee40a069baa.tar.gz linux-thead-4308eeb3ef9b95472f86f8753cef2ee40a069baa.tar.bz2 linux-thead-4308eeb3ef9b95472f86f8753cef2ee40a069baa.zip | |
riscv: dts: thead: Add devicetree nodes for DWC3 (host USB) controller
Add DWC3 device controller and the needed glue nodes.
Ported from vendor kernel [1].
[1] https://gitee.com/thead-yocto/kernel.git
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: I3e023ec8d778c44204fa2e67b107431fff36f035
| -rw-r--r-- | arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts | 27 | ||||
| -rw-r--r-- | arch/riscv/boot/dts/thead/th1520.dtsi | 35 |
2 files changed, 62 insertions, 0 deletions
diff --git a/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts b/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts index 7eb123bdc2b9..059edc623924 100644 --- a/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts +++ b/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts @@ -32,6 +32,26 @@ chosen { stdout-path = "serial0:115200n8"; }; + + reg_usb_hub_vdd1v2: regulator-hub-vdd12-en { + compatible = "regulator-fixed"; + regulator-name = "regulator-hub-vdd12-en"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + gpio = <&pcal6408ahk_d 2 1>; + enable-active-high; + + }; + + reg_usb_hub_vcc5v: regulator-hub-vcc5v-en { + compatible = "regulator-fixed"; + regulator-name = "regulator-hub-vcc5v-en"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&pcal6408ahk_d 3 1>; + enable-active-high; + + }; }; &uart0 { @@ -204,3 +224,10 @@ pinctrl-0 = <&pinctrl_gmac1>; }; + +&usb_1 { + hubswitch-gpio = <&porte 4 0>; + vbus-supply = <&soc_vbus_en_reg>; + hub1v2-supply = <®_usb_hub_vdd1v2>; + hub5v-supply = <®_usb_hub_vcc5v>; +}; diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi index 6a03e059f169..f8b217eb9e23 100644 --- a/arch/riscv/boot/dts/thead/th1520.dtsi +++ b/arch/riscv/boot/dts/thead/th1520.dtsi @@ -729,6 +729,12 @@ status = "okay"; }; + usb3_drd: usb3_drd@ffec03f000 { + compatible = "thead,light-usb3-drd", "syscon"; + reg = <0xff 0xec03f000 0x0 0x1000>; + status = "okay"; + }; + clk: clock-controller@ffef010000 { compatible = "thead,light-fm-ree-clk"; reg = <0xff 0xef010000 0x0 0x1000>; @@ -1129,5 +1135,34 @@ nvmem-cells = <&gmac1_mac_address>; nvmem-cell-names = "mac-address"; }; + + usb_1: usb@ffec03f000 { + compatible = "thead,dwc3"; + usb3-misc-regmap = <&miscsys_reg>; + usb3-drd-regmap = <&usb3_drd>; + clocks = <&miscsys_clk_gate CLKGEN_MISCSYS_USB3_DRD_CLK>, + <&miscsys_clk_gate CLKGEN_MISCSYS_USB3_DRD_CTRL_REF_CLK>, + <&miscsys_clk_gate CLKGEN_MISCSYS_USB3_DRD_PHY_REF_CLK>, + <&miscsys_clk_gate CLKGEN_MISCSYS_USB3_DRD_SUSPEND_CLK>; + clock-names = "drd", "ctrl", "phy", "suspend"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + usb: dwc3@ffe7040000 { + compatible = "snps,dwc3"; + reg = <0xff 0xe7040000 0x0 0x10000>; + interrupt-parent = <&plic>; + interrupts = <68 IRQ_TYPE_LEVEL_HIGH>; + reg-shift = <2>; + reg-io-width = <4>; + maximum-speed = "super-speed"; + dr_mode = "host"; + dma-mask = <0xf 0xffffffff>; + snps,usb3_lpm_capable; + snps,usb_sofitpsync; + status = "okay"; + }; + }; }; }; |