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authorWalker Chen <walker.chen@starfivetech.com>2023-01-19 17:44:47 +0800
committerJaehoon Chung <jh80.chung@samsung.com>2023-07-25 08:24:26 +0900
commit144f22f6415f23d3c72a09e0e8a904a8e9ae3c71 (patch)
tree701e784b267f67633a643b2040df3cdb487bf90e /MAINTAINERS
parentc3e8af4cfb4aaac9cd3f126a1af87d5a33b067fe (diff)
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soc: starfive: Add StarFive JH71XX pmu driver
Add pmu driver for the StarFive JH71XX SoC. As the power domains provider, the Power Management Unit (PMU) is designed for including multiple PM domains that can be used for power gating of selected IP blocks for power saving by reduced leakage current. It accepts software encourage command to switch the power mode of SoC. Signed-off-by: Walker Chen <walker.chen@starfivetech.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
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diff --git a/MAINTAINERS b/MAINTAINERS
index 379387e20a96..ee7603c6f84a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -19656,6 +19656,19 @@ F: Documentation/devicetree/bindings/reset/starfive,jh7100-reset.yaml
F: drivers/reset/reset-starfive-jh7100.c
F: include/dt-bindings/reset/starfive-jh7100.h
+STARFIVE SOC DRIVERS
+M: Conor Dooley <conor@kernel.org>
+S: Maintained
+T: git https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/
+F: drivers/soc/starfive/
+
+STARFIVE JH71XX PMU CONTROLLER DRIVER
+M: Walker Chen <walker.chen@starfivetech.com>
+S: Supported
+F: Documentation/devicetree/bindings/power/starfive*
+F: drivers/soc/starfive/jh71xx_pmu.c
+F: include/dt-bindings/power/starfive,jh7110-pmu.h
+
STATIC BRANCH/CALL
M: Peter Zijlstra <peterz@infradead.org>
M: Josh Poimboeuf <jpoimboe@kernel.org>