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author | Emil Renner Berthing <kernel@esmil.dk> | 2022-04-06 01:04:45 +0200 |
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committer | Ćukasz Stelmach <l.stelmach@samsung.com> | 2023-01-31 16:43:41 +0100 |
commit | ad5b761b03493b4c20dfb239385f7d5acbbc13cc (patch) | |
tree | ba98d584b0ee5159cc3b4c308db8dc6289e6dd16 | |
parent | b53a535d8c2c9c25f46f5d755db101f2d5bd4a0c (diff) | |
download | linux-starfive-ad5b761b03493b4c20dfb239385f7d5acbbc13cc.tar.gz linux-starfive-ad5b761b03493b4c20dfb239385f7d5acbbc13cc.tar.bz2 linux-starfive-ad5b761b03493b4c20dfb239385f7d5acbbc13cc.zip |
dt-bindings: sifive,ccache0: Support StarFive JH7110 SoC
This cache controller is also used on the StarFive JH7110 SoC.
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
-rw-r--r-- | Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml b/Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml index bf3f07421f7e..262d1d49ce25 100644 --- a/Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml +++ b/Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml @@ -25,6 +25,7 @@ select: - sifive,ccache0 - sifive,fu540-c000-ccache - sifive,fu740-c000-ccache + - starfive,jh7110-ccache required: - compatible @@ -37,6 +38,7 @@ properties: - sifive,ccache0 - sifive,fu540-c000-ccache - sifive,fu740-c000-ccache + - starfive,jh7110-ccache - const: cache - items: - const: microchip,mpfs-ccache @@ -86,6 +88,7 @@ allOf: enum: - sifive,fu740-c000-ccache - microchip,mpfs-ccache + - starfive,jh7110-ccache then: properties: @@ -105,7 +108,9 @@ allOf: properties: compatible: contains: - const: sifive,fu740-c000-ccache + enum: + - sifive,fu740-c000-ccache + - starfive,jh7110-ccache then: properties: |