From bac89d754ba333453576fd38eb6073d7f89818fe Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Sun, 2 Oct 2011 15:09:11 +0800 Subject: arm/imx6q: add core definitions and low-level debug uart It adds the core definitions and low-level debug uart support for imx6q. Signed-off-by: Shawn Guo --- arch/arm/plat-mxc/Kconfig | 7 ++++++ arch/arm/plat-mxc/include/mach/debug-macro.S | 2 ++ arch/arm/plat-mxc/include/mach/hardware.h | 6 +++++ arch/arm/plat-mxc/include/mach/irqs.h | 10 +++++++-- arch/arm/plat-mxc/include/mach/mx6q.h | 33 ++++++++++++++++++++++++++++ 5 files changed, 56 insertions(+), 2 deletions(-) create mode 100644 arch/arm/plat-mxc/include/mach/mx6q.h (limited to 'arch/arm/plat-mxc') diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig index 502e45f03178..058d1c5f0043 100644 --- a/arch/arm/plat-mxc/Kconfig +++ b/arch/arm/plat-mxc/Kconfig @@ -29,6 +29,13 @@ config ARCH_MX5 This enables support for machines using Freescale's i.MX50 and i.MX51 processors. +config ARCH_MX6 + bool "i.MX6" + select AUTO_ZRELADDR if !ZBOOT_ROM + select ARM_PATCH_PHYS_VIRT + help + This enables support for systems based on the Freescale i.MX6 family + endchoice source "arch/arm/mach-imx/Kconfig" diff --git a/arch/arm/plat-mxc/include/mach/debug-macro.S b/arch/arm/plat-mxc/include/mach/debug-macro.S index 72986013c1fb..6e192c4a391a 100644 --- a/arch/arm/plat-mxc/include/mach/debug-macro.S +++ b/arch/arm/plat-mxc/include/mach/debug-macro.S @@ -24,6 +24,8 @@ #define UART_PADDR MX51_UART1_BASE_ADDR #elif defined (CONFIG_DEBUG_IMX50_IMX53_UART) #define UART_PADDR MX53_UART1_BASE_ADDR +#elif defined (CONFIG_DEBUG_IMX6Q_UART) +#define UART_PADDR MX6Q_UART4_BASE_ADDR #endif #define UART_VADDR IMX_IO_ADDRESS(UART_PADDR) diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/plat-mxc/include/mach/hardware.h index eba3118adfbb..a599f01f8b92 100644 --- a/arch/arm/plat-mxc/include/mach/hardware.h +++ b/arch/arm/plat-mxc/include/mach/hardware.h @@ -91,6 +91,11 @@ * SPBA0 0x50000000+0x100000 -> 0xf5400000+0x100000 * AIPS1 0x53f00000+0x100000 -> 0xf5700000+0x100000 * AIPS2 0x63f00000+0x100000 -> 0xf5300000+0x100000 + * mx6q: + * SCU 0x00a00000+0x001000 -> 0xf4000000+0x001000 + * CCM 0x020c4000+0x004000 -> 0xf42c4000+0x004000 + * ANATOP 0x020c8000+0x001000 -> 0xf42c8000+0x001000 + * UART4 0x021f0000+0x004000 -> 0xf42f0000+0x004000 */ #define IMX_IO_P2V(x) ( \ 0xf4000000 + \ @@ -102,6 +107,7 @@ #include +#include #include #include #include diff --git a/arch/arm/plat-mxc/include/mach/irqs.h b/arch/arm/plat-mxc/include/mach/irqs.h index 00e812bbd81d..fd9efb044656 100644 --- a/arch/arm/plat-mxc/include/mach/irqs.h +++ b/arch/arm/plat-mxc/include/mach/irqs.h @@ -14,9 +14,15 @@ #include /* - * SoCs with TZIC interrupt controller have 128 IRQs, those with AVIC have 64 + * SoCs with GIC interrupt controller have 160 IRQs, those with TZIC + * have 128 IRQs, and those with AVIC have 64. + * + * To support single image, the biggest number should be defined on + * top of the list. */ -#ifdef CONFIG_MXC_TZIC +#if defined CONFIG_ARM_GIC +#define MXC_INTERNAL_IRQS 160 +#elif defined CONFIG_MXC_TZIC #define MXC_INTERNAL_IRQS 128 #else #define MXC_INTERNAL_IRQS 64 diff --git a/arch/arm/plat-mxc/include/mach/mx6q.h b/arch/arm/plat-mxc/include/mach/mx6q.h new file mode 100644 index 000000000000..254a561a2799 --- /dev/null +++ b/arch/arm/plat-mxc/include/mach/mx6q.h @@ -0,0 +1,33 @@ +/* + * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2011 Linaro Ltd. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#ifndef __MACH_MX6Q_H__ +#define __MACH_MX6Q_H__ + +#define MX6Q_IO_P2V(x) IMX_IO_P2V(x) +#define MX6Q_IO_ADDRESS(x) IOMEM(MX6Q_IO_P2V(x)) + +/* + * The following are the blocks that need to be statically mapped. + * For other blocks, the base address really should be retrieved from + * device tree. + */ +#define MX6Q_SCU_BASE_ADDR 0x00a00000 +#define MX6Q_SCU_SIZE 0x1000 +#define MX6Q_CCM_BASE_ADDR 0x020c4000 +#define MX6Q_CCM_SIZE 0x4000 +#define MX6Q_ANATOP_BASE_ADDR 0x020c8000 +#define MX6Q_ANATOP_SIZE 0x1000 +#define MX6Q_UART4_BASE_ADDR 0x021f0000 +#define MX6Q_UART4_SIZE 0x4000 + +#endif /* __MACH_MX6Q_H__ */ -- cgit v1.2.3 From 1103643c266ae45c7098e0f7f3ee0b68e3e7c7cc Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Sat, 24 Sep 2011 00:43:06 +0800 Subject: arm/imx: add gic_handle_irq function This is a plain translation of assembly gic irq handler to C function for CONFIG_MULTI_IRQ_HANDLER support on imx family. Signed-off-by: Shawn Guo --- arch/arm/plat-mxc/Makefile | 2 +- arch/arm/plat-mxc/gic.c | 48 ++++++++++++++++++++++++++++ arch/arm/plat-mxc/include/mach/common.h | 2 ++ arch/arm/plat-mxc/include/mach/entry-macro.S | 6 ++++ 4 files changed, 57 insertions(+), 1 deletion(-) create mode 100644 arch/arm/plat-mxc/gic.c (limited to 'arch/arm/plat-mxc') diff --git a/arch/arm/plat-mxc/Makefile b/arch/arm/plat-mxc/Makefile index d53c35fe2ea7..b9f0f5f499a4 100644 --- a/arch/arm/plat-mxc/Makefile +++ b/arch/arm/plat-mxc/Makefile @@ -5,7 +5,7 @@ # Common support obj-y := clock.o time.o devices.o cpu.o system.o irq-common.o -# MX51 uses the TZIC interrupt controller, older platforms use AVIC +obj-$(CONFIG_ARM_GIC) += gic.o obj-$(CONFIG_MXC_TZIC) += tzic.o obj-$(CONFIG_MXC_AVIC) += avic.o diff --git a/arch/arm/plat-mxc/gic.c b/arch/arm/plat-mxc/gic.c new file mode 100644 index 000000000000..b3b8eed263b8 --- /dev/null +++ b/arch/arm/plat-mxc/gic.c @@ -0,0 +1,48 @@ +/* + * Copyright 2011 Freescale Semiconductor, Inc. + * Copyright 2011 Linaro Ltd. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#ifdef CONFIG_SMP +#include +#endif + +asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs) +{ + u32 irqstat, irqnr; + + do { + irqstat = readl_relaxed(gic_cpu_base_addr + GIC_CPU_INTACK); + irqnr = irqstat & 0x3ff; + if (irqnr == 1023) + break; + + if (irqnr > 29 && irqnr < 1021) + handle_IRQ(irqnr, regs); +#ifdef CONFIG_SMP + else if (irqnr < 16) { + writel_relaxed(irqstat, gic_cpu_base_addr + + GIC_CPU_EOI); + handle_IPI(irqnr, regs); + } +#endif +#ifdef CONFIG_LOCAL_TIMERS + else if (irqnr == 29) { + writel_relaxed(irqstat, gic_cpu_base_addr + + GIC_CPU_EOI); + handle_local_timer(regs); + } +#endif + } while (1); +} diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h index ace4bb550edc..c2258374488a 100644 --- a/arch/arm/plat-mxc/include/mach/common.h +++ b/arch/arm/plat-mxc/include/mach/common.h @@ -86,6 +86,7 @@ extern void imx_print_silicon_rev(const char *cpu, int srev); void avic_handle_irq(struct pt_regs *); void tzic_handle_irq(struct pt_regs *); +void gic_handle_irq(struct pt_regs *); #define imx1_handle_irq avic_handle_irq #define imx21_handle_irq avic_handle_irq @@ -96,5 +97,6 @@ void tzic_handle_irq(struct pt_regs *); #define imx50_handle_irq tzic_handle_irq #define imx51_handle_irq tzic_handle_irq #define imx53_handle_irq tzic_handle_irq +#define imx6q_handle_irq gic_handle_irq #endif diff --git a/arch/arm/plat-mxc/include/mach/entry-macro.S b/arch/arm/plat-mxc/include/mach/entry-macro.S index 842fbcb0d6cc..9fe0dfcf4e7e 100644 --- a/arch/arm/plat-mxc/include/mach/entry-macro.S +++ b/arch/arm/plat-mxc/include/mach/entry-macro.S @@ -22,3 +22,9 @@ .macro get_irqnr_and_base, irqnr, irqstat, base, tmp .endm + + .macro test_for_ipi, irqnr, irqstat, base, tmp + .endm + + .macro test_for_ltirq, irqnr, irqstat, base, tmp + .endm -- cgit v1.2.3 From 69c31b7a6e9cd4654ed0bfc7e70b4d7076a5cdb3 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Tue, 6 Sep 2011 14:59:40 +0800 Subject: arm/imx6q: add smp and cpu hotplug support It adds smp and cpu hotplug support for imx6q. Signed-off-by: Shawn Guo --- arch/arm/plat-mxc/include/mach/common.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch/arm/plat-mxc') diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h index c2258374488a..6340df2284d7 100644 --- a/arch/arm/plat-mxc/include/mach/common.h +++ b/arch/arm/plat-mxc/include/mach/common.h @@ -99,4 +99,9 @@ void gic_handle_irq(struct pt_regs *); #define imx53_handle_irq tzic_handle_irq #define imx6q_handle_irq gic_handle_irq +extern void imx_enable_cpu(int cpu, bool enable); +extern void imx_set_cpu_jump(int cpu, void *jump_addr); +#ifdef CONFIG_SMP +extern void v7_secondary_startup(void); +#endif #endif -- cgit v1.2.3 From 13eed9897a2160272df2804ac3bbd4d91c76e577 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Tue, 6 Sep 2011 15:05:25 +0800 Subject: arm/imx6q: add device tree machine support It adds generic device tree based machine support for imx6q. Signed-off-by: Shawn Guo --- arch/arm/plat-mxc/include/mach/common.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'arch/arm/plat-mxc') diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h index 6340df2284d7..607b4623af0c 100644 --- a/arch/arm/plat-mxc/include/mach/common.h +++ b/arch/arm/plat-mxc/include/mach/common.h @@ -64,6 +64,7 @@ extern int mx51_clocks_init(unsigned long ckil, unsigned long osc, unsigned long ckih1, unsigned long ckih2); extern int mx53_clocks_init(unsigned long ckil, unsigned long osc, unsigned long ckih1, unsigned long ckih2); +extern int mx6q_clocks_init(void); extern struct platform_device *mxc_register_gpio(char *name, int id, resource_size_t iobase, resource_size_t iosize, int irq, int irq_high); extern void mxc_set_cpu_type(unsigned int type); @@ -101,7 +102,19 @@ void gic_handle_irq(struct pt_regs *); extern void imx_enable_cpu(int cpu, bool enable); extern void imx_set_cpu_jump(int cpu, void *jump_addr); +#ifdef CONFIG_DEBUG_LL +extern void imx_lluart_map_io(void); +#else +static inline void imx_lluart_map_io(void) {} +#endif #ifdef CONFIG_SMP extern void v7_secondary_startup(void); +extern void imx_scu_map_io(void); +#else +static inline void imx_scu_map_io(void) {} #endif +extern void imx_enable_cpu(int cpu, bool enable); +extern void imx_set_cpu_jump(int cpu, void *jump_addr); +extern void imx_src_init(void); +extern void imx_gpc_init(void); #endif -- cgit v1.2.3 From a1f1c7efb0c1c78b5e84455bb5a6c8b2bee3059c Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Tue, 6 Sep 2011 15:08:40 +0800 Subject: arm/imx6q: add suspend/resume support It adds suspend/resume support for imx6q. Signed-off-by: Anson Huang Signed-off-by: Shawn Guo --- arch/arm/plat-mxc/include/mach/common.h | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'arch/arm/plat-mxc') diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h index 607b4623af0c..6a7d993a17a6 100644 --- a/arch/arm/plat-mxc/include/mach/common.h +++ b/arch/arm/plat-mxc/include/mach/common.h @@ -13,6 +13,7 @@ struct platform_device; struct clk; +enum mxc_cpu_pwr_mode; extern void mx1_map_io(void); extern void mx21_map_io(void); @@ -107,14 +108,22 @@ extern void imx_lluart_map_io(void); #else static inline void imx_lluart_map_io(void) {} #endif +extern void v7_cpu_resume(void); +extern u32 *pl310_get_save_ptr(void); #ifdef CONFIG_SMP extern void v7_secondary_startup(void); extern void imx_scu_map_io(void); +extern void imx_smp_prepare(void); #else static inline void imx_scu_map_io(void) {} +static inline void imx_smp_prepare(void) {} #endif extern void imx_enable_cpu(int cpu, bool enable); extern void imx_set_cpu_jump(int cpu, void *jump_addr); extern void imx_src_init(void); extern void imx_gpc_init(void); +extern void imx_gpc_pre_suspend(void); +extern void imx_gpc_post_resume(void); +extern int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode); +extern void imx6q_pm_init(void); #endif -- cgit v1.2.3 From a89cf59b5c344e50b7be3cabb67dc1ed94439b6e Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Tue, 27 Sep 2011 13:48:02 +0800 Subject: arm/imx: merge i.MX3 and i.MX6 The patch merges the build of imx3 and imx6. The Kconfig symbol ARCH_IMX_V6_V7 is introduced to replace ARCH_MX3 and ARCH_MX6. Signed-off-by: Sascha Hauer Signed-off-by: Shawn Guo --- arch/arm/plat-mxc/Kconfig | 18 +++++++----------- 1 file changed, 7 insertions(+), 11 deletions(-) (limited to 'arch/arm/plat-mxc') diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig index 058d1c5f0043..2704951d8cd9 100644 --- a/arch/arm/plat-mxc/Kconfig +++ b/arch/arm/plat-mxc/Kconfig @@ -6,7 +6,7 @@ menu "Freescale MXC Implementations" choice prompt "Freescale CPU family:" - default ARCH_MX3 + default ARCH_IMX_V6_V7 config ARCH_IMX_V4_V5 bool "i.MX1, i.MX21, i.MX25, i.MX27" @@ -16,10 +16,13 @@ config ARCH_IMX_V4_V5 This enables support for systems based on the Freescale i.MX ARMv4 and ARMv5 SoCs -config ARCH_MX3 - bool "MX3-based" +config ARCH_IMX_V6_V7 + bool "i.MX3, i.MX6" + select AUTO_ZRELADDR if !ZBOOT_ROM + select ARM_PATCH_PHYS_VIRT help - This enables support for systems based on the Freescale i.MX3 family + This enables support for systems based on the Freescale i.MX3 and i.MX6 + family. config ARCH_MX5 bool "i.MX50, i.MX51, i.MX53" @@ -29,13 +32,6 @@ config ARCH_MX5 This enables support for machines using Freescale's i.MX50 and i.MX51 processors. -config ARCH_MX6 - bool "i.MX6" - select AUTO_ZRELADDR if !ZBOOT_ROM - select ARM_PATCH_PHYS_VIRT - help - This enables support for systems based on the Freescale i.MX6 family - endchoice source "arch/arm/mach-imx/Kconfig" -- cgit v1.2.3