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| author | Ingo Molnar <mingo@elte.hu> | 2008-05-28 17:33:46 -0400 |
|---|---|---|
| committer | Chris Wright <chrisw@sous-sol.org> | 2008-06-09 11:27:03 -0700 |
| commit | 80f3186924d89e1e8f3dbe9d7efdd7921a355769 (patch) | |
| tree | f24446ca08f42b48eb15ad2afca5fb8367bd875c /include | |
| parent | 2486e8fca463e0f9e6edfebe07186cb7478c6a95 (diff) | |
| download | linux-stable-80f3186924d89e1e8f3dbe9d7efdd7921a355769.tar.gz linux-stable-80f3186924d89e1e8f3dbe9d7efdd7921a355769.tar.bz2 linux-stable-80f3186924d89e1e8f3dbe9d7efdd7921a355769.zip | |
x86: prevent PGE flush from interruption/preemption
upstream commit: b1979a5fda7869a790f4fd83fb06c78498d26ba1
CR4 manipulation is not protected against interrupts and preemption,
but KVM uses smp_function_call to manipulate the X86_CR4_VMXE bit
either from the CPU hotplug code or from the kvm_init call.
We need to protect the CR4 manipulation from both interrupts and
preemption.
Original bug report: http://lkml.org/lkml/2008/5/7/48
Bugzilla entry: http://bugzilla.kernel.org/show_bug.cgi?id=10642
This is not a regression from 2.6.25, it's a long standing and hard to
trigger bug.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Chris Wright <chrisw@sous-sol.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/asm-x86/tlbflush.h | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/include/asm-x86/tlbflush.h b/include/asm-x86/tlbflush.h index 3998709ed637..b7a6a086e0de 100644 --- a/include/asm-x86/tlbflush.h +++ b/include/asm-x86/tlbflush.h @@ -22,12 +22,23 @@ static inline void __native_flush_tlb(void) static inline void __native_flush_tlb_global(void) { - unsigned long cr4 = read_cr4(); + unsigned long flags; + unsigned long cr4; + /* + * Read-modify-write to CR4 - protect it from preemption and + * from interrupts. (Use the raw variant because this code can + * be called from deep inside debugging code.) + */ + raw_local_irq_save(flags); + + cr4 = read_cr4(); /* clear PGE */ write_cr4(cr4 & ~X86_CR4_PGE); /* write old PGE again and flush TLBs */ write_cr4(cr4); + + raw_local_irq_restore(flags); } static inline void __native_flush_tlb_single(unsigned long addr) |