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| author | Stephen Warren <swarren@nvidia.com> | 2014-02-18 16:51:58 -0700 |
|---|---|---|
| committer | Jiri Slaby <jslaby@suse.cz> | 2014-03-31 14:22:23 +0200 |
| commit | 304dfba651cecbac257ecfef9b12779f0e98ff2a (patch) | |
| tree | 64dadedc5a881cc1482cf3303982693247aa0129 /arch/arm | |
| parent | dffdacf81b8705d6d1a43ccb9fdf60da750f75f9 (diff) | |
| download | linux-stable-304dfba651cecbac257ecfef9b12779f0e98ff2a.tar.gz linux-stable-304dfba651cecbac257ecfef9b12779f0e98ff2a.tar.bz2 linux-stable-304dfba651cecbac257ecfef9b12779f0e98ff2a.zip | |
ARM: tegra: only run PL310 init on systems with one
commit 8859685785bfafadf9bc922dd3a2278e59886947 upstream.
Fix tegra_init_cache() to check whether the system has a PL310 cache
before touching the PL310 registers. This prevents access to non-existent
registers on Tegra114 and later.
Note for stable kernels:
In <= v3.12, the file to patch is arch/arm/mach-tegra/common.c.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/mach-tegra/common.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c index 94a119a35af8..3c405f43ca39 100644 --- a/arch/arm/mach-tegra/common.c +++ b/arch/arm/mach-tegra/common.c @@ -22,6 +22,7 @@ #include <linux/io.h> #include <linux/clk.h> #include <linux/delay.h> +#include <linux/of.h> #include <linux/reboot.h> #include <linux/irqchip.h> #include <linux/clk-provider.h> @@ -82,10 +83,20 @@ void tegra_assert_system_reset(enum reboot_mode mode, const char *cmd) static void __init tegra_init_cache(void) { #ifdef CONFIG_CACHE_L2X0 + static const struct of_device_id pl310_ids[] __initconst = { + { .compatible = "arm,pl310-cache", }, + {} + }; + + struct device_node *np; int ret; void __iomem *p = IO_ADDRESS(TEGRA_ARM_PERIF_BASE) + 0x3000; u32 aux_ctrl, cache_type; + np = of_find_matching_node(NULL, pl310_ids); + if (!np) + return; + cache_type = readl(p + L2X0_CACHE_TYPE); aux_ctrl = (cache_type & 0x700) << (17-8); aux_ctrl |= 0x7C400001; |