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author | Michal Marek <mmarek@suse.cz> | 2010-10-12 15:09:06 +0200 |
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committer | Michal Marek <mmarek@suse.cz> | 2010-10-12 15:09:06 +0200 |
commit | 239060b93bb30a4ad55f1ecaa512464a035cc5ba (patch) | |
tree | 77f79810e57d4fc24356eca0cd6db463e8994128 /arch/arm/mach-tegra/include/mach/system.h | |
parent | 1408b15b98635a13bad2e2a50b3c2ae2ccdf625b (diff) | |
parent | e9203c988234aa512bd45ca32b52e21c7bbfc414 (diff) | |
download | linux-stable-239060b93bb30a4ad55f1ecaa512464a035cc5ba.tar.gz linux-stable-239060b93bb30a4ad55f1ecaa512464a035cc5ba.tar.bz2 linux-stable-239060b93bb30a4ad55f1ecaa512464a035cc5ba.zip |
Merge branch 'kbuild/rc-fixes' into kbuild/kconfig
We need to revert the temporary hack in 71ebc01, hence the merge.
Diffstat (limited to 'arch/arm/mach-tegra/include/mach/system.h')
-rw-r--r-- | arch/arm/mach-tegra/include/mach/system.h | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/include/mach/system.h b/arch/arm/mach-tegra/include/mach/system.h new file mode 100644 index 000000000000..84d5d46113f7 --- /dev/null +++ b/arch/arm/mach-tegra/include/mach/system.h @@ -0,0 +1,39 @@ +/* + * arch/arm/mach-tegra/include/mach/system.h + * + * Copyright (C) 2010 Google, Inc. + * + * Author: + * Colin Cross <ccross@google.com> + * Erik Gilling <konkers@google.com> + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef __MACH_TEGRA_SYSTEM_H +#define __MACH_TEGRA_SYSTEM_H + +#include <mach/hardware.h> +#include <mach/iomap.h> + +static inline void arch_idle(void) +{ +} + +static inline void arch_reset(char mode, const char *cmd) +{ + void __iomem *reset = IO_ADDRESS(TEGRA_CLK_RESET_BASE + 0x04); + u32 reg = readl(reset); + reg |= 0x04; + writel(reg, reset); +} + +#endif |