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author | Tomoya MORINAGA <tomoya.rohm@gmail.com> | 2011-12-09 13:13:28 +0900 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2012-05-21 10:46:24 -0700 |
commit | 06dd28fc316fa8a8627c0271d24e1d68b51ca6a3 (patch) | |
tree | c0a16717db8dc077f00c7945d7dbe2e5ac544572 | |
parent | 000d91aa2297c6d9da219918afa42c729db376dd (diff) | |
download | linux-stable-06dd28fc316fa8a8627c0271d24e1d68b51ca6a3.tar.gz linux-stable-06dd28fc316fa8a8627c0271d24e1d68b51ca6a3.tar.bz2 linux-stable-06dd28fc316fa8a8627c0271d24e1d68b51ca6a3.zip |
spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
commit f258b44e22e07f5e98ac2260c70acff5784791b6 upstream.
This patch supports a spi mode setup and bit order setup by IO control.
spi mode: mode 0 to mode 3
bit order: LSB first, MSB first
Signed-off-by: Tomoya MORINAGA <tomoya.rohm@gmail.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r-- | drivers/spi/spi-topcliff-pch.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/spi/spi-topcliff-pch.c b/drivers/spi/spi-topcliff-pch.c index 6d0c238a370c..9f1241dd569e 100644 --- a/drivers/spi/spi-topcliff-pch.c +++ b/drivers/spi/spi-topcliff-pch.c @@ -1434,6 +1434,7 @@ static int __devinit pch_spi_pd_probe(struct platform_device *plat_dev) master->num_chipselect = PCH_MAX_CS; master->setup = pch_spi_setup; master->transfer = pch_spi_transfer; + master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST; data->board_dat = board_dat; data->plat_dev = plat_dev; |