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| author | YunQiang Su <ysu@wavecomp.com> | 2019-01-08 13:45:10 +0800 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2019-01-23 08:09:49 +0100 |
| commit | 0c79a6a8ed98ba7efc80f6dd6e729750147e2e2e (patch) | |
| tree | 7c7c9ae309cfeadb1412bc4146f25dcddaa75401 /arch | |
| parent | ee624c01973b4cbc56eecac96bf1a72790d3addf (diff) | |
| download | linux-rpi3-0c79a6a8ed98ba7efc80f6dd6e729750147e2e2e.tar.gz linux-rpi3-0c79a6a8ed98ba7efc80f6dd6e729750147e2e2e.tar.bz2 linux-rpi3-0c79a6a8ed98ba7efc80f6dd6e729750147e2e2e.zip | |
Disable MSI also when pcie-octeon.pcie_disable on
commit a214720cbf50cd8c3f76bbb9c3f5c283910e9d33 upstream.
Octeon has an boot-time option to disable pcie.
Since MSI depends on PCI-E, we should also disable MSI also with
this option is on in order to avoid inadvertently accessing PCIe
registers.
Signed-off-by: YunQiang Su <ysu@wavecomp.com>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: pburton@wavecomp.com
Cc: linux-mips@vger.kernel.org
Cc: aaro.koskinen@iki.fi
Cc: stable@vger.kernel.org # v3.3+
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/mips/pci/msi-octeon.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/mips/pci/msi-octeon.c b/arch/mips/pci/msi-octeon.c index 2a5bb849b10e..288b58b00dc8 100644 --- a/arch/mips/pci/msi-octeon.c +++ b/arch/mips/pci/msi-octeon.c @@ -369,7 +369,9 @@ int __init octeon_msi_initialize(void) int irq; struct irq_chip *msi; - if (octeon_dma_bar_type == OCTEON_DMA_BAR_TYPE_PCIE) { + if (octeon_dma_bar_type == OCTEON_DMA_BAR_TYPE_INVALID) { + return 0; + } else if (octeon_dma_bar_type == OCTEON_DMA_BAR_TYPE_PCIE) { msi_rcv_reg[0] = CVMX_PEXP_NPEI_MSI_RCV0; msi_rcv_reg[1] = CVMX_PEXP_NPEI_MSI_RCV1; msi_rcv_reg[2] = CVMX_PEXP_NPEI_MSI_RCV2; |