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authorWill Deacon <will.deacon@arm.com>2014-11-14 17:18:23 +0000
committerWill Deacon <will.deacon@arm.com>2015-01-19 14:46:44 +0000
commite1d3c0fd701df831169b116cd5c5d6203ac07f70 (patch)
treeeb2537042682bf45a36148d06bb0bfb10ce3da74 /MAINTAINERS
parentfdb1d7be7c4d452e9735aeb2b60ae8a2fcf0a514 (diff)
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iommu: add ARM LPAE page table allocator
A number of IOMMUs found in ARM SoCs can walk architecture-compatible page tables. This patch adds a generic allocator for Stage-1 and Stage-2 v7/v8 long-descriptor page tables. 4k, 16k and 64k pages are supported, with up to 4-levels of walk to cover a 48-bit address space. Tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
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diff --git a/MAINTAINERS b/MAINTAINERS
index 3589d67437f8..00b27863384e 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1589,6 +1589,7 @@ M: Will Deacon <will.deacon@arm.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
F: drivers/iommu/arm-smmu.c
+F: drivers/iommu/io-pgtable-arm.c
ARM64 PORT (AARCH64 ARCHITECTURE)
M: Catalin Marinas <catalin.marinas@arm.com>