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authorHoegeun Kwon <hoegeun.kwon@samsung.com>2019-02-14 10:42:48 +0900
committerHoegeun Kwon <hoegeun.kwon@samsung.com>2019-02-19 09:07:54 +0900
commit000dd4be9ae28113d4242fd710737968b6e46569 (patch)
tree4f6cc7c6229885a53db37e554c585598bbf56060
parente409c8d08de5506a2b4c6312edfa24a94bd8ad6a (diff)
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drm/panel: Fix the panel's timing clock
There is a problem that sparkling pixels in panel. So we need to get the latest timing clock values from the mainline. Change-Id: I330c56815bb5e732a9bad87500dd69191118528c Signed-off-by: Hoegeun Kwon <hoegeun.kwon@samsung.com>
-rw-r--r--drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c33
1 files changed, 8 insertions, 25 deletions
diff --git a/drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c b/drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c
index 128523d8d518..186969f148e1 100644
--- a/drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c
+++ b/drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c
@@ -205,35 +205,18 @@ struct rpi_touchscreen {
static const struct drm_display_mode rpi_touchscreen_modes[] = {
{
- /* The DSI PLL can only integer divide from the 2Ghz
- * PLLD, giving us few choices. We pick a divide by 3
- * as our DSI HS clock, giving us a pixel clock of
- * that divided by 24 bits. Pad out HFP to get our
- * panel to refresh at 60Hz, even if that doesn't
- * match the datasheet.
+ /* Modeline comes from the Raspberry Pi firmware, with HFP=1
+ * plugged in and clock re-computed from that.
*/
-#define PIXEL_CLOCK ((2000000000 / 3) / 24)
-#define VREFRESH 60
-#define VTOTAL (480 + 7 + 2 + 21)
-#define HACT 800
-#define HSW 2
-#define HBP 46
-#define HFP ((PIXEL_CLOCK / (VTOTAL * VREFRESH)) - (HACT + HSW + HBP))
-
- /* Round up the pixel clock a bit (10khz), so that the
- * "don't run things faster than the requested clock
- * rate" rule of the clk driver doesn't reject the
- * divide-by-3 mode due to rounding error.
- */
- .clock = PIXEL_CLOCK / 1000 + 10,
- .hdisplay = HACT,
- .hsync_start = HACT + HFP,
- .hsync_end = HACT + HFP + HSW,
- .htotal = HACT + HFP + HSW + HBP,
+ .clock = 25979400 / 1000,
+ .hdisplay = 800,
+ .hsync_start = 800 + 1,
+ .hsync_end = 800 + 1 + 2,
+ .htotal = 800 + 1 + 2 + 46,
.vdisplay = 480,
.vsync_start = 480 + 7,
.vsync_end = 480 + 7 + 2,
- .vtotal = VTOTAL,
+ .vtotal = 480 + 7 + 2 + 21,
.vrefresh = 60,
},
};