diff options
| author | John Hsu <KCHSU0@nuvoton.com> | 2016-12-20 12:03:09 +0800 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2016-12-31 18:57:19 +0000 |
| commit | a1792cda51300e15b03549cccf0b09f3be82e697 (patch) | |
| tree | f060a6d1cabf4c66994f6550a527d403758cffd8 /sound | |
| parent | a33b56a6a824fa5cd89c74f85cbeb9af1dcef87e (diff) | |
| download | linux-rpi-a1792cda51300e15b03549cccf0b09f3be82e697.tar.gz linux-rpi-a1792cda51300e15b03549cccf0b09f3be82e697.tar.bz2 linux-rpi-a1792cda51300e15b03549cccf0b09f3be82e697.zip | |
ASoC: nau8825: fix invalid configuration in Pre-Scalar of FLL
The clk_ref_div is not configured in the correct position of the
register. The patch fixes that clk_ref_div, Pre-Scalar, is assigned
the wrong value.
Signed-off-by: John Hsu <KCHSU0@nuvoton.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound')
| -rw-r--r-- | sound/soc/codecs/nau8825.c | 3 | ||||
| -rw-r--r-- | sound/soc/codecs/nau8825.h | 3 |
2 files changed, 4 insertions, 2 deletions
diff --git a/sound/soc/codecs/nau8825.c b/sound/soc/codecs/nau8825.c index abf77dd422f4..4576f987a4a5 100644 --- a/sound/soc/codecs/nau8825.c +++ b/sound/soc/codecs/nau8825.c @@ -2006,7 +2006,8 @@ static void nau8825_fll_apply(struct nau8825 *nau8825, NAU8825_FLL_INTEGER_MASK, fll_param->fll_int); /* FLL pre-scaler */ regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL4, - NAU8825_FLL_REF_DIV_MASK, fll_param->clk_ref_div); + NAU8825_FLL_REF_DIV_MASK, + fll_param->clk_ref_div << NAU8825_FLL_REF_DIV_SFT); /* select divided VCO input */ regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL5, NAU8825_FLL_CLK_SW_MASK, NAU8825_FLL_CLK_SW_REF); diff --git a/sound/soc/codecs/nau8825.h b/sound/soc/codecs/nau8825.h index b6b21b312854..514fd13c2f46 100644 --- a/sound/soc/codecs/nau8825.h +++ b/sound/soc/codecs/nau8825.h @@ -137,7 +137,8 @@ #define NAU8825_FLL_CLK_SRC_FS (0x3 << NAU8825_FLL_CLK_SRC_SFT) /* FLL4 (0x07) */ -#define NAU8825_FLL_REF_DIV_MASK (0x3 << 10) +#define NAU8825_FLL_REF_DIV_SFT 10 +#define NAU8825_FLL_REF_DIV_MASK (0x3 << NAU8825_FLL_REF_DIV_SFT) /* FLL5 (0x08) */ #define NAU8825_FLL_PDB_DAC_EN (0x1 << 15) |