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author | Arnd Bergmann <arnd@arndb.de> | 2022-12-07 22:07:48 +0100 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2022-12-07 22:07:48 +0100 |
commit | 9379885d07c466a9207e88c0fd0c8b3541536fe3 (patch) | |
tree | dc145b21adef05a74bc3ca70df44606b9a289a3c /include | |
parent | 66310b5a0fc1ccdce9a3a5e6c6a12c08e4e0b7b1 (diff) | |
parent | f33ca7ec5e5e3a53d5636a4eab270bacac751f6e (diff) | |
download | linux-rpi-9379885d07c466a9207e88c0fd0c8b3541536fe3.tar.gz linux-rpi-9379885d07c466a9207e88c0fd0c8b3541536fe3.tar.bz2 linux-rpi-9379885d07c466a9207e88c0fd0c8b3541536fe3.zip |
Merge tag 'qcom-drivers-for-6.2-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers
More Qualcomm driver updates for 6.2
Socinfo is extended with knowledge about MSM8956, MSM8976, SM6115,
SM4250, SM8150, SA8155 and SM8550.
Support for RSC v3, as found in SM8550 is added to the RPMH RSC driver.
Support for SM8550 and SM4250 ARC regulators are added to the RPM(h)
power-domain drivers. SM8550 support is added to the LLCC driver.
The AOSS QMP binding is declared compatible for SM8550.
BWMON and LLCC now selects REGMAP_MMIO to ensure dependencies are built
properly.
* tag 'qcom-drivers-for-6.2-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
soc: qcom: socinfo: Add SM6115 / SM4250 SoC IDs to the soc_id table
dt-bindings: arm: qcom,ids: Add SoC IDs for SM6115 / SM4250 and variants
soc: qcom: socinfo: Add SM8150 and SA8155 SoC IDs to the soc_id table
dt-bindings: arm: qcom,ids: Add SoC IDs for SM8150 and SA8155
dt-bindings: soc: qcom: apr: document generic qcom,apr compatible
soc: qcom: Select REMAP_MMIO for ICC_BWMON driver
soc: qcom: Select REMAP_MMIO for LLCC driver
soc: qcom: rpmpd: Add SM4250 support
dt-bindings: power: rpmpd: Add SM4250 support
dt-bindings: soc: qcom: aoss: Add compatible for SM8550
soc: qcom: llcc: Add configuration data for SM8550
dt-bindings: arm: msm: Add LLCC compatible for SM8550
soc: qcom: llcc: Add v4.1 HW version support
soc: qcom: socinfo: Add SM8550 ID
soc: qcom: rpmh-rsc: Avoid unnecessary checks on irq-done response
soc: qcom: rpmh-rsc: Add support for RSC v3 register offsets
soc: qcom: rpmhpd: Add SM8550 power domains
dt-bindings: power: rpmpd: Add SM8550 to rpmpd binding
soc: qcom: socinfo: Add MSM8956/76 SoC IDs to the soc_id table
dt-bindings: arm: qcom,ids: Add SoC IDs for MSM8956 and MSM8976
Link: https://lore.kernel.org/r/20221207154134.3233779-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'include')
-rw-r--r-- | include/dt-bindings/arm/qcom,ids.h | 9 | ||||
-rw-r--r-- | include/dt-bindings/power/qcom-rpmpd.h | 26 | ||||
-rw-r--r-- | include/linux/soc/qcom/llcc-qcom.h | 12 |
3 files changed, 47 insertions, 0 deletions
diff --git a/include/dt-bindings/arm/qcom,ids.h b/include/dt-bindings/arm/qcom,ids.h index 8b1a0f43bd93..f7aef3f310d7 100644 --- a/include/dt-bindings/arm/qcom,ids.h +++ b/include/dt-bindings/arm/qcom,ids.h @@ -78,6 +78,8 @@ #define QCOM_ID_MSM8616 250 #define QCOM_ID_MSM8992 251 #define QCOM_ID_APQ8094 253 +#define QCOM_ID_MSM8956 266 +#define QCOM_ID_MSM8976 278 #define QCOM_ID_MDM9607 290 #define QCOM_ID_APQ8096 291 #define QCOM_ID_MSM8998 292 @@ -102,6 +104,7 @@ #define QCOM_ID_SDA658 326 #define QCOM_ID_SDA630 327 #define QCOM_ID_SDM450 338 +#define QCOM_ID_SM8150 339 #define QCOM_ID_SDA845 341 #define QCOM_ID_IPQ8072 342 #define QCOM_ID_IPQ8076 343 @@ -112,6 +115,7 @@ #define QCOM_ID_SDA632 350 #define QCOM_ID_SDA450 351 #define QCOM_ID_SM8250 356 +#define QCOM_ID_SA8155 362 #define QCOM_ID_IPQ8070 375 #define QCOM_ID_IPQ8071 376 #define QCOM_ID_IPQ8072A 389 @@ -123,11 +127,13 @@ #define QCOM_ID_IPQ8071A 396 #define QCOM_ID_IPQ6018 402 #define QCOM_ID_IPQ6028 403 +#define QCOM_ID_SM4250 417 #define QCOM_ID_IPQ6000 421 #define QCOM_ID_IPQ6010 422 #define QCOM_ID_SC7180 425 #define QCOM_ID_SM6350 434 #define QCOM_ID_SM8350 439 +#define QCOM_ID_SM6115 444 #define QCOM_ID_SC8280XP 449 #define QCOM_ID_IPQ6005 453 #define QCOM_ID_QRB5165 455 @@ -135,11 +141,14 @@ #define QCOM_ID_SM7225 459 #define QCOM_ID_SA8295P 460 #define QCOM_ID_SA8540P 461 +#define QCOM_ID_QCM4290 469 +#define QCOM_ID_QCS4290 470 #define QCOM_ID_SM8450_2 480 #define QCOM_ID_SM8450_3 482 #define QCOM_ID_SC7280 487 #define QCOM_ID_SC7180P 495 #define QCOM_ID_SM6375 507 +#define QCOM_ID_SM8550 519 #define QCOM_ID_QRU1000 539 #define QCOM_ID_QDU1000 545 #define QCOM_ID_QDU1010 587 diff --git a/include/dt-bindings/power/qcom-rpmpd.h b/include/dt-bindings/power/qcom-rpmpd.h index 7b2e4b66419a..1e19e258a74d 100644 --- a/include/dt-bindings/power/qcom-rpmpd.h +++ b/include/dt-bindings/power/qcom-rpmpd.h @@ -113,6 +113,22 @@ #define SM8450_MXC_AO 11 #define SM8450_MSS 12 +/* SM8550 Power Domain Indexes */ +#define SM8550_CX 0 +#define SM8550_CX_AO 1 +#define SM8550_EBI 2 +#define SM8550_GFX 3 +#define SM8550_LCX 4 +#define SM8550_LMX 5 +#define SM8550_MMCX 6 +#define SM8550_MMCX_AO 7 +#define SM8550_MX 8 +#define SM8550_MX_AO 9 +#define SM8550_MXC 10 +#define SM8550_MXC_AO 11 +#define SM8550_MSS 12 +#define SM8550_NSP 13 + /* QDU1000/QRU1000 Power Domain Indexes */ #define QDU1000_EBI 0 #define QDU1000_MSS 1 @@ -290,6 +306,16 @@ #define SDM660_SSCMX 8 #define SDM660_SSCMX_VFL 9 +/* SM4250 Power Domains */ +#define SM4250_VDDCX 0 +#define SM4250_VDDCX_AO 1 +#define SM4250_VDDCX_VFL 2 +#define SM4250_VDDMX 3 +#define SM4250_VDDMX_AO 4 +#define SM4250_VDDMX_VFL 5 +#define SM4250_VDD_LPI_CX 6 +#define SM4250_VDD_LPI_MX 7 + /* SM6115 Power Domains */ #define SM6115_VDDCX 0 #define SM6115_VDDCX_AO 1 diff --git a/include/linux/soc/qcom/llcc-qcom.h b/include/linux/soc/qcom/llcc-qcom.h index bc2fb8343a94..ad1fd718169d 100644 --- a/include/linux/soc/qcom/llcc-qcom.h +++ b/include/linux/soc/qcom/llcc-qcom.h @@ -42,7 +42,19 @@ #define LLCC_CPUHWT 36 #define LLCC_MDMCLAD2 37 #define LLCC_CAMEXP1 38 +#define LLCC_CMPTHCP 39 +#define LLCC_LCPDARE 40 #define LLCC_AENPU 45 +#define LLCC_ISLAND1 46 +#define LLCC_ISLAND2 47 +#define LLCC_ISLAND3 48 +#define LLCC_ISLAND4 49 +#define LLCC_CAMEXP2 50 +#define LLCC_CAMEXP3 51 +#define LLCC_CAMEXP4 52 +#define LLCC_DISP_WB 53 +#define LLCC_DISP_1 54 +#define LLCC_VIDVSP 64 /** * struct llcc_slice_desc - Cache slice descriptor |