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| author | Rajan Vaja <rajan.vaja@xilinx.com> | 2021-06-28 00:01:21 -0700 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2021-06-28 23:35:36 -0700 |
| commit | 54530ed17d1cc096f9ab0319001c96a63f772c62 (patch) | |
| tree | 84c412575e77301110b3585404c26b7e31710e4f /drivers/clk/zynqmp | |
| parent | 1b09c308e64969f545f4b9474b786ad90dddf9a2 (diff) | |
| download | linux-rpi-54530ed17d1cc096f9ab0319001c96a63f772c62.tar.gz linux-rpi-54530ed17d1cc096f9ab0319001c96a63f772c62.tar.bz2 linux-rpi-54530ed17d1cc096f9ab0319001c96a63f772c62.zip | |
clk: zynqmp: Use firmware specific mux clock flags
Use ZynqMP specific mux clock flags instead of using CCF flags.
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Link: https://lore.kernel.org/r/20210628070122.26217-4-rajan.vaja@xilinx.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/zynqmp')
| -rw-r--r-- | drivers/clk/zynqmp/clk-mux-zynqmp.c | 23 | ||||
| -rw-r--r-- | drivers/clk/zynqmp/clk-zynqmp.h | 8 |
2 files changed, 30 insertions, 1 deletions
diff --git a/drivers/clk/zynqmp/clk-mux-zynqmp.c b/drivers/clk/zynqmp/clk-mux-zynqmp.c index 42ad324b1c64..157d4a960bf4 100644 --- a/drivers/clk/zynqmp/clk-mux-zynqmp.c +++ b/drivers/clk/zynqmp/clk-mux-zynqmp.c @@ -96,6 +96,27 @@ static const struct clk_ops zynqmp_clk_mux_ro_ops = { .get_parent = zynqmp_clk_mux_get_parent, }; +static inline unsigned long zynqmp_clk_map_mux_ccf_flags( + const u32 zynqmp_type_flag) +{ + unsigned long ccf_flag = 0; + + if (zynqmp_type_flag & ZYNQMP_CLK_MUX_INDEX_ONE) + ccf_flag |= CLK_MUX_INDEX_ONE; + if (zynqmp_type_flag & ZYNQMP_CLK_MUX_INDEX_BIT) + ccf_flag |= CLK_MUX_INDEX_BIT; + if (zynqmp_type_flag & ZYNQMP_CLK_MUX_HIWORD_MASK) + ccf_flag |= CLK_MUX_HIWORD_MASK; + if (zynqmp_type_flag & ZYNQMP_CLK_MUX_READ_ONLY) + ccf_flag |= CLK_MUX_READ_ONLY; + if (zynqmp_type_flag & ZYNQMP_CLK_MUX_ROUND_CLOSEST) + ccf_flag |= CLK_MUX_ROUND_CLOSEST; + if (zynqmp_type_flag & ZYNQMP_CLK_MUX_BIG_ENDIAN) + ccf_flag |= CLK_MUX_BIG_ENDIAN; + + return ccf_flag; +} + /** * zynqmp_clk_register_mux() - Register a mux table with the clock * framework @@ -131,7 +152,7 @@ struct clk_hw *zynqmp_clk_register_mux(const char *name, u32 clk_id, init.parent_names = parents; init.num_parents = num_parents; - mux->flags = nodes->type_flag; + mux->flags = zynqmp_clk_map_mux_ccf_flags(nodes->type_flag); mux->hw.init = &init; mux->clk_id = clk_id; diff --git a/drivers/clk/zynqmp/clk-zynqmp.h b/drivers/clk/zynqmp/clk-zynqmp.h index 925a727eb383..84fa80a969a9 100644 --- a/drivers/clk/zynqmp/clk-zynqmp.h +++ b/drivers/clk/zynqmp/clk-zynqmp.h @@ -33,6 +33,14 @@ #define ZYNQMP_CLK_DIVIDER_READ_ONLY BIT(5) #define ZYNQMP_CLK_DIVIDER_MAX_AT_ZERO BIT(6) +/* Type Flags for mux clock */ +#define ZYNQMP_CLK_MUX_INDEX_ONE BIT(0) +#define ZYNQMP_CLK_MUX_INDEX_BIT BIT(1) +#define ZYNQMP_CLK_MUX_HIWORD_MASK BIT(2) +#define ZYNQMP_CLK_MUX_READ_ONLY BIT(3) +#define ZYNQMP_CLK_MUX_ROUND_CLOSEST BIT(4) +#define ZYNQMP_CLK_MUX_BIG_ENDIAN BIT(5) + enum topology_type { TYPE_INVALID, TYPE_MUX, |