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| author | Guo Ren <guoren@linux.alibaba.com> | 2020-01-25 00:37:09 +0800 |
|---|---|---|
| committer | Guo Ren <guoren@linux.alibaba.com> | 2020-02-21 15:43:24 +0800 |
| commit | a1176734132c630b50908c36563e05fb3599682c (patch) | |
| tree | cb054b34a4fb5e0a58c7c5318a5a0ec06432c88a /arch/csky/abiv1 | |
| parent | 761b4f694cb90b63ca2739ac8a8a176342636e5e (diff) | |
| download | linux-rpi-a1176734132c630b50908c36563e05fb3599682c.tar.gz linux-rpi-a1176734132c630b50908c36563e05fb3599682c.tar.bz2 linux-rpi-a1176734132c630b50908c36563e05fb3599682c.zip | |
csky: Remove unnecessary flush_icache_* implementation
The abiv2 CPUs are all PIPT cache, so there is no need to implement
flush_icache_page function.
The function flush_icache_user_range hasn't been used, so just
remove it.
The function flush_cache_range is not necessary for PIPT cache when
tlb mapping changed.
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Diffstat (limited to 'arch/csky/abiv1')
| -rw-r--r-- | arch/csky/abiv1/inc/abi/cacheflush.h | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/arch/csky/abiv1/inc/abi/cacheflush.h b/arch/csky/abiv1/inc/abi/cacheflush.h index 79ef9e8c1afd..a73702704f38 100644 --- a/arch/csky/abiv1/inc/abi/cacheflush.h +++ b/arch/csky/abiv1/inc/abi/cacheflush.h @@ -49,9 +49,6 @@ extern void flush_cache_range(struct vm_area_struct *vma, unsigned long start, u #define flush_icache_page(vma, page) do {} while (0); #define flush_icache_range(start, end) cache_wbinv_range(start, end) -#define flush_icache_user_range(vma,page,addr,len) \ - flush_dcache_page(page) - #define copy_from_user_page(vma, page, vaddr, dst, src, len) \ do { \ memcpy(dst, src, len); \ |