diff options
| author | Mika Westerberg <mika.westerberg@linux.intel.com> | 2018-09-17 16:30:49 +0300 |
|---|---|---|
| committer | Mika Westerberg <mika.westerberg@linux.intel.com> | 2019-04-18 11:18:53 +0300 |
| commit | 4f807e47ee9a75747d042a8eacf398f436da9452 (patch) | |
| tree | f8bbff8b83730fe4ea3275ebba63d9ff274350ac /drivers/thunderbolt/tb_regs.h | |
| parent | c5ee6feb34709da96f9909b8a2e1e42875020efb (diff) | |
| download | linux-riscv-4f807e47ee9a75747d042a8eacf398f436da9452.tar.gz linux-riscv-4f807e47ee9a75747d042a8eacf398f436da9452.tar.bz2 linux-riscv-4f807e47ee9a75747d042a8eacf398f436da9452.zip | |
thunderbolt: Add support for Display Port tunnels
Display Port tunnels are somewhat more complex than PCIe tunnels as it
requires 3 tunnels (AUX Rx/Tx and Video). In addition we are not
supposed to create the tunnels immediately when a DP OUT is enumerated.
Instead we need to wait until we get hotplug event to that adapter port
or check if the port has HPD set before tunnels can be established. This
adds Display Port tunneling support to the software connection manager.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Diffstat (limited to 'drivers/thunderbolt/tb_regs.h')
| -rw-r--r-- | drivers/thunderbolt/tb_regs.h | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/drivers/thunderbolt/tb_regs.h b/drivers/thunderbolt/tb_regs.h index 74c0f4a5606d..3ce705184e2c 100644 --- a/drivers/thunderbolt/tb_regs.h +++ b/drivers/thunderbolt/tb_regs.h @@ -213,6 +213,28 @@ struct tb_regs_port_header { /* DWORD 4 */ #define TB_PORT_NFC_CREDITS_MASK GENMASK(19, 0) +#define TB_PORT_MAX_CREDITS_SHIFT 20 +#define TB_PORT_MAX_CREDITS_MASK GENMASK(26, 20) + +/* Display Port adapter registers */ + +/* DWORD 0 */ +#define TB_DP_VIDEO_HOPID_SHIFT 16 +#define TB_DP_VIDEO_HOPID_MASK GENMASK(26, 16) +#define TB_DP_AUX_EN BIT(30) +#define TB_DP_VIDEO_EN BIT(31) +/* DWORD 1 */ +#define TB_DP_AUX_TX_HOPID_MASK GENMASK(10, 0) +#define TB_DP_AUX_RX_HOPID_SHIFT 11 +#define TB_DP_AUX_RX_HOPID_MASK GENMASK(21, 11) +/* DWORD 2 */ +#define TB_DP_HDP BIT(6) +/* DWORD 3 */ +#define TB_DP_HPDC BIT(9) +/* DWORD 4 */ +#define TB_DP_LOCAL_CAP 0x4 +/* DWORD 5 */ +#define TB_DP_REMOTE_CAP 0x5 /* PCIe adapter registers */ |